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Message-ID: <Za6d/lSARdxpqU4e@lizhi-Precision-Tower-5810>
Date: Mon, 22 Jan 2024 11:55:26 -0500
From: Frank Li <Frank.li@....com>
To: joy.zou@....com, vkoul@...nel.org
Cc: devicetree@...r.kernel.org, dmaengine@...r.kernel.org,
imx@...ts.linux.dev, krzysztof.kozlowski+dt@...aro.org,
linux-kernel@...r.kernel.org, peng.fan@....com, robh+dt@...nel.org,
shenwei.wang@....com
Subject: Re: [PATCH v4 0/6] dmaengine: fsl-edma: integrate TCD64 support for
64bit physical address
On Thu, Dec 21, 2023 at 10:35:22AM -0500, Frank Li wrote:
> Change from v3 to v4.
> Fixed tcd64 type as fsl_edma_hw_tcd64
>
> Change from v2 to v3:
> - fix sparse build warning
>
> Change from v1 to v2:
> - fixed mcf-edma-main.c build error.
> - fixed readq build error. readq actually is not atomic read in imx95.
> So split to two ioread32\iowrite32.
> It needs read at least twice to avoid lower 32 bit part wrap during read
> up 32bit part.
>
> first 2 patch is prepare, No function change.
> 3rd patch is dt-bind doc
> 4rd patch is actuall support TCD64
@vnod:
Could you please check these patches? I still have more patches,
which depended on this.
eDMA is used for cross whole i.MX chips.
Frank
>
> Frank Li (6):
> dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd()
> dmaengine: fsl-edma: fix spare build warning
> dmaengine: fsl-edma: add address for channel mux register in
> fsl_edma_chan
> dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access
> dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string
> dmaengine: fsl-edma: integrate TCD64 support for i.MX95
>
> .../devicetree/bindings/dma/fsl,edma.yaml | 2 +
> drivers/dma/fsl-edma-common.c | 101 ++++++-----
> drivers/dma/fsl-edma-common.h | 161 ++++++++++++++++--
> drivers/dma/fsl-edma-main.c | 19 ++-
> drivers/dma/mcf-edma-main.c | 2 +-
> 5 files changed, 223 insertions(+), 62 deletions(-)
>
> --
> 2.34.1
>
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