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Message-Id: <cover.1705916069.git.haibo1.xu@intel.com>
Date: Mon, 22 Jan 2024 17:58:30 +0800
From: Haibo Xu <haibo1.xu@...el.com>
To:
Cc: xiaobo55x@...il.com,
ajones@...tanamicro.com,
Haibo Xu <haibo1.xu@...el.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Paolo Bonzini <pbonzini@...hat.com>,
Shuah Khan <shuah@...nel.org>,
Marc Zyngier <maz@...nel.org>,
Oliver Upton <oliver.upton@...ux.dev>,
James Morse <james.morse@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Zenghui Yu <yuzenghui@...wei.com>,
Anup Patel <anup@...infault.org>,
Atish Patra <atishp@...shpatra.org>,
Guo Ren <guoren@...nel.org>,
Conor Dooley <conor.dooley@...rochip.com>,
Mayuresh Chitale <mchitale@...tanamicro.com>,
wchen <waylingii@...il.com>,
Greentime Hu <greentime.hu@...ive.com>,
Jisheng Zhang <jszhang@...nel.org>,
Samuel Holland <samuel@...lland.org>,
Minda Chen <minda.chen@...rfivetech.com>,
Sean Christopherson <seanjc@...gle.com>,
Peter Xu <peterx@...hat.com>,
Like Xu <likexu@...cent.com>,
Vipin Sharma <vipinsh@...gle.com>,
Thomas Huth <thuth@...hat.com>,
Aaron Lewis <aaronlewis@...gle.com>,
Maciej Wieczor-Retman <maciej.wieczor-retman@...el.com>,
linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
kvm@...r.kernel.org,
linux-kselftest@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
kvmarm@...ts.linux.dev,
kvm-riscv@...ts.infradead.org
Subject: [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests
The RISC-V arch_timer selftests is used to validate Sstc timer
functionality in a guest, which sets up periodic timer interrupts
and check the basic interrupt status upon its receipt.
This KVM selftests was ported from aarch64 arch_timer and tested
with Linux v6.7-rc8 on a Qemu riscv64 virt machine.
---
Changed since v4:
* Rebased to Linux 6.7-rc8
* Added new patch(2/12) to clean up the data type in struct test_args
* Re-ordered patch(11/11) in v4 to patch(3/12)
* Changed the timer_err_margin_us type from int to uint32_t
Haibo Xu (11):
KVM: arm64: selftests: Data type cleanup for arch_timer test
KVM: arm64: selftests: Enable tuning of error margin in arch_timer
test
KVM: arm64: selftests: Split arch_timer test code
KVM: selftests: Add CONFIG_64BIT definition for the build
tools: riscv: Add header file csr.h
tools: riscv: Add header file vdso/processor.h
KVM: riscv: selftests: Switch to use macro from csr.h
KVM: riscv: selftests: Add exception handling support
KVM: riscv: selftests: Add guest helper to get vcpu id
KVM: riscv: selftests: Change vcpu_has_ext to a common function
KVM: riscv: selftests: Add sstc timer test
Paolo Bonzini (1):
selftests/kvm: Fix issues with $(SPLIT_TESTS)
tools/arch/riscv/include/asm/csr.h | 541 ++++++++++++++++++
tools/arch/riscv/include/asm/vdso/processor.h | 32 ++
tools/testing/selftests/kvm/Makefile | 27 +-
.../selftests/kvm/aarch64/arch_timer.c | 295 +---------
tools/testing/selftests/kvm/arch_timer.c | 259 +++++++++
.../selftests/kvm/include/aarch64/processor.h | 4 -
.../selftests/kvm/include/kvm_util_base.h | 9 +
.../selftests/kvm/include/riscv/arch_timer.h | 71 +++
.../selftests/kvm/include/riscv/processor.h | 65 ++-
.../testing/selftests/kvm/include/test_util.h | 2 +
.../selftests/kvm/include/timer_test.h | 45 ++
.../selftests/kvm/lib/riscv/handlers.S | 101 ++++
.../selftests/kvm/lib/riscv/processor.c | 87 +++
.../testing/selftests/kvm/riscv/arch_timer.c | 111 ++++
.../selftests/kvm/riscv/get-reg-list.c | 11 +-
15 files changed, 1353 insertions(+), 307 deletions(-)
create mode 100644 tools/arch/riscv/include/asm/csr.h
create mode 100644 tools/arch/riscv/include/asm/vdso/processor.h
create mode 100644 tools/testing/selftests/kvm/arch_timer.c
create mode 100644 tools/testing/selftests/kvm/include/riscv/arch_timer.h
create mode 100644 tools/testing/selftests/kvm/include/timer_test.h
create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
create mode 100644 tools/testing/selftests/kvm/riscv/arch_timer.c
--
2.34.1
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