linux-kernel - Re: [PATCH v2] dt-bindings: PCI: ti,j721e-pci-host: Add support for J722S SoC

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Message-ID: <f0d41955-6eaa-4931-a65e-84e1906ff0b1@ti.com>
Date: Mon, 22 Jan 2024 15:31:11 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: Conor Dooley <conor@...nel.org>
CC: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
        <robh@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <vigneshr@...com>,
        <afd@...com>, <srk@...com>, <s-vadapalli@...com>
Subject: Re: [PATCH v2] dt-bindings: PCI: ti,j721e-pci-host: Add support for
 J722S SoC

Hello Conor,

On 22/01/24 15:17, Conor Dooley wrote:
> On Mon, Jan 22, 2024 at 12:14:57PM +0530, Siddharth Vadapalli wrote:
>> TI's J722S SoC has one instance of a Gen3 Single-Lane PCIe controller.
>> The controller on J722S SoC is similar to the one present on TI's AM64
>> SoC, with the difference being that the controller on AM64 SoC supports
>> up to Gen2 link speed while the one on J722S SoC supports Gen3 link speed.
>>
>> Update the bindings with a new compatible for J722S SoC.
> 
> Since the difference is just that this device supports a higher link
> speed, should it not have a fallback compatible to the am64 variant?
> Or is the programming model different for this device for the lower link
> speeds different?

Thank you for reviewing the patch. I shall add the same fallback compatible that
am64 has which is "ti,j721e-pcie-host". I will post the v3 patch with this
change if that's acceptable.

-- 
Regards,
Siddharth.