linux-kernel - Re: [PATCH v8 2/5] dt-bindings: soc: sophgo: Add Sophgo system control module

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <7d87c455-7af5-4339-9088-6015d5847e88@linaro.org>
Date: Mon, 22 Jan 2024 13:56:51 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Chen Wang <unicorn_wang@...look.com>, Chen Wang <unicornxw@...il.com>,
 aou@...s.berkeley.edu, chao.wei@...hgo.com, conor@...nel.org,
 krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
 palmer@...belt.com, paul.walmsley@...ive.com, richardcochran@...il.com,
 robh+dt@...nel.org, sboyd@...nel.org, devicetree@...r.kernel.org,
 linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-riscv@...ts.infradead.org, haijiao.liu@...hgo.com,
 xiaoguang.xing@...hgo.com, guoren@...nel.org, jszhang@...nel.org,
 inochiama@...look.com, samuel.holland@...ive.com
Subject: Re: [PATCH v8 2/5] dt-bindings: soc: sophgo: Add Sophgo system
 control module

On 22/01/2024 11:11, Chen Wang wrote:
>>>>>> +    $ref: /schemas/clock/sophgo,sg2042-sysclk.yaml#
>>>>>> +    type: object
>>>>> Why isn't this merged here? You do not need the child node really...
>>>>> unless the clock inputs are specific to that clock controller and you
>>>>> will have here more devices? But where are they in such case?
>>>> I don't see more devices will be included later. It should be ok to
>>>> merge them into one.
>>> hi, Krzysztof,
>>>
>>> After some double check, I find we will have more devices in
>>> system-control. For example, in the SYS_CTRL area, there is also a
>>> section of registers used to control the "General Purpose Interrupt".
>>> The pcie controller of sg2042 will use this interrupt controller which
>>> is defined in SYS_CTRL, we will add it in later work.
>>>
>> I expect then all devices to be documented.
> 
> hi, Krzysztof.
> 
> First, I'm very sorry for having double-checked with you for this system 
> controller and child node issue, but this time I'm sure there should be 
> no more child nodes except the clock and interrupt controllers, though 
> there are some other registers in SYS_CTRL section, but we will not use 
> them till now.
> 
> One question, when you say "to be documented", do you mean I need write 
> binding/yaml files for other child node? But they exceed the scope of 
> this patchset (this patchset is for clock support only). That's why I 

That's not true. The scope of this patch is to add DT binding
description for your device. If you choose any other scope, I don't
agree and I am not going to provide positive review.

> suggest just add clock-controller in this patchset and to add the 
> interrupt controller in another patchset for pcie support. This 
> mechanism should be suitable for our expansion.

How then are you going to solve the requirement: "DO attempt to make
bindings complete even"?

https://elixir.bootlin.com/linux/v6.1-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L17

Best regards,
Krzysztof