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Message-ID: <CAJM55Z_DFox9c_eDeHtx9H+9e4A6pjkCkt7po94j_mu-tQWywg@mail.gmail.com>
Date: Mon, 22 Jan 2024 05:25:18 -0800
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: Jingbao Qiu <qiujingbao.dlmu@...il.com>, alexandre.belloni@...tlin.com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
chao.wei@...hgo.com, unicorn_wang@...look.com, paul.walmsley@...ive.com,
palmer@...belt.com, aou@...s.berkeley.edu
Cc: linux-rtc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
dlan@...too.org
Subject: Re: [PATCH v7 3/3] riscv: dts: sophgo: add rtc dt node for CV1800
Jingbao Qiu wrote:
> Add the rtc device tree node to cv1800 SoC.
>
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@...il.com>
> ---
> arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index df40e87ee063..0cd7eb9a3048 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -119,5 +119,12 @@ clint: timer@...00000 {
> reg = <0x74000000 0x10000>;
> interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
> };
> +
> + rtc: rtc@...5000 {
> + compatible = "sophgo,cv1800-rtc";
> + reg = <0x5025000 0x2000>;
> + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&osc>;
> + };
Before this patch it looks like the nodes are sorted by their address,
but this would break it.
> };
> };
> --
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
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