[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <94742ebd-bc3a-4726-9ba7-5954203e4da1@suse.com>
Date: Mon, 22 Jan 2024 15:39:09 +0100
From: Matthias Brugger <mbrugger@...e.com>
To: Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
Chester Lin <chester62515@...il.com>, Andreas Farber <afaerber@...e.de>,
Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>
Cc: NXP S32 Linux Team <s32@....com>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
NXP Linux Team <linux-imx@....com>, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, Ghennadi Procopciuc
<ghennadi.procopciuc@....com>, Catalin Udma <catalin-dan.udma@....com>
Subject: Re: [PATCH v2 1/2] arm64: dts: s32g: add SCMI firmware node
On 22/01/2024 15:06, Ghennadi Procopciuc wrote:
> From: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
>
> Linux controls the clocks over SCMI on S32G SoCs. Therefore,
> add the SCMI device tree node and the reserved region for SCMI
> messages.
>
> Signed-off-by: Catalin Udma <catalin-dan.udma@....com>
> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
Reviewed-by: Matthias Brugger <mbrugger@...e.com>
> ---
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 27 +++++++++++++++++++++++-
> 1 file changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 5ac1cc9ff50e..ef1a1d61f2ba 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -3,7 +3,7 @@
> * NXP S32G2 SoC family
> *
> * Copyright (c) 2021 SUSE LLC
> - * Copyright (c) 2017-2021 NXP
> + * Copyright 2017-2021, 2024 NXP
> */
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -14,6 +14,18 @@ / {
> #address-cells = <2>;
> #size-cells = <2>;
>
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + scmi_buf: shm@...00000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0x0 0xd0000000 0x0 0x80>;
> + no-map;
> + };
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -77,6 +89,19 @@ timer {
> };
>
> firmware {
> + scmi {
> + compatible = "arm,scmi-smc";
> + arm,smc-id = <0xc20000fe>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + shmem = <&scmi_buf>;
> +
> + clks: protocol@14 {
> + reg = <0x14>;
> + #clock-cells = <1>;
> + };
> + };
> +
> psci {
> compatible = "arm,psci-1.0";
> method = "smc";
Powered by blists - more mailing lists