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Message-ID: <54d4fe7f-2e36-4bb3-8b51-4a68510010d5@intel.com>
Date: Tue, 23 Jan 2024 08:33:51 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Tony W Wang-oc <TonyWWang-oc@...oxin.com>, herbert@...dor.apana.org.au,
 davem@...emloft.net, linux-crypto@...r.kernel.org,
 linux-kernel@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
 bp@...en8.de, dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
 seanjc@...gle.com, kim.phillips@....com, kirill.shutemov@...ux.intel.com,
 jmattson@...gle.com, babu.moger@....com, kai.huang@...el.com,
 acme@...hat.com, aik@....com, namhyung@...nel.org
Cc: CobeChen@...oxin.com, TimGuo@...oxin.com, LeoLiu-oc@...oxin.com,
 GeorgeXue@...oxin.com
Subject: Re: [PATCH v2 1/3] crypto: padlock-sha: Matches CPU with Family with
 6 explicitly

On 1/22/24 18:28, Tony W Wang-oc wrote:
> Updates the supporting qualification for packlock-sha driver, making
> it support CPUs whose vendor ID is Centaur and Famliy is 6.

This changelog isn't telling us very much.  *Why* is this a good change?

> diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c
> index 6865c7f1fc1a..2e82c5e77f7a 100644
> --- a/drivers/crypto/padlock-sha.c
> +++ b/drivers/crypto/padlock-sha.c
> @@ -491,7 +491,7 @@ static struct shash_alg sha256_alg_nano = {
>  };
>  
>  static const struct x86_cpu_id padlock_sha_ids[] = {
> -	X86_MATCH_FEATURE(X86_FEATURE_PHE, NULL),
> +	X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 6, X86_FEATURE_PHE, NULL),
>  	{}
>  };

Logically, this is saying that there are non-CENTAUR or non-family-6
CPUs that set X86_FEATURE_PHE, but don't support X86_FEATURE_PHE.  Is
that the case?

The one Intel use of X86_MATCH_VENDOR_FAM_FEATURE() also looks a bit
suspect, btw.

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