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Date: Tue, 23 Jan 2024 19:09:37 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>, Andy Gross <agross@...nel.org>,
 Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Sibi Sankar <quic_sibis@...cinc.com>,
 Rajendra Nayak <quic_rjendra@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 05/11] arm64: dts: qcom: x1e80100: Add TCSR node



On 1/23/24 12:01, Abel Vesa wrote:
> Add the TCSR clock controller and halt register space node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---

The former - yes, the latter - ?

Konrad
>   arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index be69e71b7f53..2b6c55a486b2 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -2606,6 +2606,14 @@ tcsr_mutex: hwlock@...0000 {
>   			#hwlock-cells = <1>;
>   		};
>   
> +		tcsr: clock-controller@...0000 {
> +			compatible = "qcom,x1e80100-tcsr", "syscon";
> +			reg = <0 0x01fc0000 0 0x30000>;
> +			clocks = <&rpmhcc RPMH_CXO_CLK>;
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +		};
> +
>   		gem_noc: interconnect@...00000 {
>   			compatible = "qcom,x1e80100-gem-noc";
>   			reg = <0 0x26400000 0 0x311200>;
> 

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