linux-kernel - Re: [PATCH v4 07/11] arm64: dts: qcom: x1e80100: Add PCIe nodes

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Date: Tue, 23 Jan 2024 19:20:38 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>, Andy Gross <agross@...nel.org>,
 Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Sibi Sankar <quic_sibis@...cinc.com>,
 Rajendra Nayak <quic_rjendra@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 07/11] arm64: dts: qcom: x1e80100: Add PCIe nodes



On 1/23/24 12:01, Abel Vesa wrote:
> Add nodes for PCIe 4 and 6 controllers and their PHYs for X1E80100 platform.
> 
> Co-developed-by: Sibi Sankar <quic_sibis@...cinc.com>
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> Co-developed-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---

[...]

> +
> +			interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "msi";

You may want to add ITS MSIs too

[...]

> +
> +			resets = <&gcc GCC_PCIE_6A_BCR>,
> +				<&gcc GCC_PCIE_6A_LINK_DOWN_BCR>;

The second entry is misaligned

Konrad