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Message-ID: <d7c2ce8e-7725-4aae-a45c-3dc77ff31097@linaro.org>
Date: Tue, 23 Jan 2024 13:49:03 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Sam Protsenko <semen.protsenko@...aro.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Andi Shyti <andi.shyti@...nel.org>, Mark Brown <broonie@...nel.org>,
 Rob Herring <robh+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: Alim Akhtar <alim.akhtar@...sung.com>,
 Sylwester Nawrocki <s.nawrocki@...sung.com>,
 Tomasz Figa <tomasz.figa@...il.com>, Chanwoo Choi <cw00.choi@...sung.com>,
 linux-spi@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH 4/7] clk: samsung: exynos850: Propagate SPI IPCLK rate
 change

On 20/01/2024 02:29, Sam Protsenko wrote:
> @@ -974,19 +974,19 @@ static const struct samsung_fixed_rate_clock cmgp_fixed_clks[] __initconst = {
>  static const struct samsung_mux_clock cmgp_mux_clks[] __initconst = {
>  	MUX(CLK_MOUT_CMGP_ADC, "mout_cmgp_adc", mout_cmgp_adc_p,
>  	    CLK_CON_MUX_CLK_CMGP_ADC, 0, 1),
> -	MUX(CLK_MOUT_CMGP_USI0, "mout_cmgp_usi0", mout_cmgp_usi0_p,
> -	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP0, 0, 1),
> -	MUX(CLK_MOUT_CMGP_USI1, "mout_cmgp_usi1", mout_cmgp_usi1_p,
> -	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP1, 0, 1),
> +	MUX_F(CLK_MOUT_CMGP_USI0, "mout_cmgp_usi0", mout_cmgp_usi0_p,
> +	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP0, 0, 1, CLK_SET_RATE_PARENT, 0),
> +	MUX_F(CLK_MOUT_CMGP_USI1, "mout_cmgp_usi1", mout_cmgp_usi1_p,
> +	    CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP1, 0, 1, CLK_SET_RATE_PARENT, 0),

Checkpatch strict complains on missing alignment. Please fix.

Best regards,
Krzysztof


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