linux-kernel - Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Wed, 24 Jan 2024 18:30:08 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: David Regan <dregan@...adcom.com>
Cc: dregan@...l.com, richard@....at, vigneshr@...com, robh+dt@...nel.org,
 krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
 computersforpeace@...il.com, kdasu.kdev@...il.com,
 linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, joel.peshkin@...adcom.com,
 tomer.yacoby@...adcom.com, dan.beygelman@...adcom.com,
 william.zhang@...adcom.com, anand.gore@...adcom.com,
 kursad.oney@...adcom.com, florian.fainelli@...adcom.com, rafal@...ecki.pl,
 bcm-kernel-feedback-list@...adcom.com, andre.przywara@....com,
 baruch@...s.co.il, linux-arm-kernel@...ts.infradead.org,
 dan.carpenter@...aro.org
Subject: Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND
 controller node

Hi David,

dregan@...adcom.com wrote on Tue, 23 Jan 2024 19:04:50 -0800:

> From: William Zhang <william.zhang@...adcom.com>
> 
> Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts
> files.
> 
> Signed-off-by: William Zhang <william.zhang@...adcom.com>
> Reviewed-by: David Regan <dregan@...adcom.com>
> ---
> Changes in v3: None
> ---
> Changes in v2: None
> ---
>  arch/arm/boot/dts/broadcom/bcm47622.dtsi    | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm63138.dtsi    | 10 +++++++++-
>  arch/arm/boot/dts/broadcom/bcm63148.dtsi    | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm63178.dtsi    | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6756.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6846.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6855.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm6878.dtsi     | 17 +++++++++++++++++
>  arch/arm/boot/dts/broadcom/bcm947622.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm963138.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 12 +++++-------
>  arch/arm/boot/dts/broadcom/bcm963148.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm963178.dts    |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96756.dts     |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96846.dts     |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96855.dts     |  4 ++++
>  arch/arm/boot/dts/broadcom/bcm96878.dts     |  4 ++++
>  17 files changed, 165 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
> index 7cd38de118c3..55ff18043d96 100644
> --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
> @@ -138,6 +138,23 @@ hsspi: spi@...0 {
>  			status = "disabled";
>  		};
>  
> +		nand_controller: nand-controller@...0 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
> +			reg = <0x1800 0x600>, <0x2000 0x10>;
> +			reg-names = "nand", "nand-int-base";
> +			brcm,nand-use-wp = <0>;
> +			status = "disabled";
> +
> +			nandcs: nand@0 {
> +				compatible = "brcm,nandcs";
> +				reg = <0>;
> +				nand-on-flash-bbt;
> +				brcm,nand-ecc-use-strap;

Describing the NAND chip in a SoC DTSI does not look relevant to me.
Even more if you add something like this nand-ecc-use-strap setting
which is very board dependent.

Same applies to your arm64 DT patch.

Thanks,
Miquèl