linux-kernel - Re: [PATCH v3 10/17] pinctrl: eyeq5: add platform driver

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Date: Wed, 24 Jan 2024 18:31:39 +0100
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: "Rob Herring" <robh@...nel.org>
Cc: "Gregory CLEMENT" <gregory.clement@...tlin.com>, "Michael Turquette"
 <mturquette@...libre.com>, "Stephen Boyd" <sboyd@...nel.org>, "Krzysztof
 Kozlowski" <krzysztof.kozlowski+dt@...aro.org>, "Conor Dooley"
 <conor+dt@...nel.org>, "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
 "Linus Walleij" <linus.walleij@...aro.org>,
 Rafał Miłecki <rafal@...ecki.pl>, "Philipp Zabel"
 <p.zabel@...gutronix.de>, "Vladimir Kondratiev"
 <vladimir.kondratiev@...ileye.com>, <linux-mips@...r.kernel.org>,
 <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
 <linux-kernel@...r.kernel.org>, "Thomas Petazzoni"
 <thomas.petazzoni@...tlin.com>, "Tawfik Bayouk"
 <tawfik.bayouk@...ileye.com>, <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v3 10/17] pinctrl: eyeq5: add platform driver

Hello,

On Wed Jan 24, 2024 at 4:19 PM CET, Rob Herring wrote:
> On Tue, Jan 23, 2024 at 07:46:55PM +0100, Théo Lebrun wrote:
> > Add the Mobileye EyeQ5 pin controller driver. It might grow to add later
> > support of other platforms from Mobileye. It belongs to a syscon region
> > called OLB.
> > 
> > Existing pins and their function live statically in the driver code
> > rather than in the devicetree, see compatible match data.
> >
> > Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
> > ---

[...]

> > diff --git a/drivers/pinctrl/pinctrl-eyeq5.c b/drivers/pinctrl/pinctrl-eyeq5.c

[...]

> > +static const struct eq5p_match eq5p_match_a = {
> > +	.regs = {
> > +		[EQ5P_PD] = 0x0C0,
> > +		[EQ5P_PU] = 0x0C4,
> > +		[EQ5P_DS_LOW] = 0x0D0,
> > +		[EQ5P_DS_HIGH] = 0x0D4,
> > +		[EQ5P_IOCR] = 0x0B0,
> > +	},
> > +	.pins = eq5p_pins_a,
> > +	.npins = ARRAY_SIZE(eq5p_pins_a),
> > +	.funcs = eq5p_functions_a,
> > +	.nfuncs = ARRAY_SIZE(eq5p_functions_a),
> > +};
> > +
> > +static const struct eq5p_match eq5p_match_b = {
> > +	.regs = {
> > +		[EQ5P_PD] = 0x0C8,
> > +		[EQ5P_PU] = 0x0CC,
> > +		[EQ5P_DS_LOW] = 0x0D8,
> > +		[EQ5P_DS_HIGH] = 0x0DC,
> > +		[EQ5P_IOCR] = 0x0B4,
> > +	},
>
> These are all the same relative offsets, so you really only need to 
> store the base offset.

Indeed, and I don't think I had even noticed. Thanks.

> The use of 2 compatibles is a bit questionable as the programming model 
> appears to be the same and only which pins differ. Surely there are 
> some other pinctrl drivers handling mutiple instances.

I can confirm the programming model is the same across both banks. I've
addressed your comment in my answer to yours on [PATCH v3 04/17].


Thanks,

--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com