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Message-ID: <047a59f6-7c6b-4854-8985-2306abbaa0a8@linaro.org>
Date: Wed, 24 Jan 2024 13:26:37 +0100
From: neil.armstrong@...aro.org
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring
<robh+dt@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
cros-qcom-dts-watchers@...omium.org
Cc: linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 12/14] arm64: dts: qcom: sm8550: Drop PCIE_AUX_CLK from
pcie_phy node
On 24/01/2024 08:36, Manivannan Sadhasivam wrote:
> PCIe PHY hw doesn't require PCIE_AUX_CLK for functioning. This clock is
> only required by the PCIe controller. Hence drop it from pcie_phy node.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index ee1ba5a8c8fc..f074683f7940 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -1760,13 +1760,11 @@ pcie0_phy: phy@...6000 {
> compatible = "qcom,sm8550-qmp-gen3x2-pcie-phy";
> reg = <0 0x01c06000 0 0x2000>;
>
> - clocks = <&gcc GCC_PCIE_0_AUX_CLK>,
> - <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
> + clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
> <&tcsr TCSR_PCIE_0_CLKREF_EN>,
> <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>,
> <&gcc GCC_PCIE_0_PIPE_CLK>;
> - clock-names = "aux", "cfg_ahb", "ref", "rchng",
> - "pipe";
> + clock-names = "cfg_ahb", "ref", "rchng", "pipe";
>
> resets = <&gcc GCC_PCIE_0_PHY_BCR>;
> reset-names = "phy";
>
Tested-by: Neil Armstrong <neil.armstrong@...aro.org> # on SM8550-HDK
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