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Message-ID: <zbxkm5jbngci5dp3oxcjccnltpht7wsyrvvekozwcsfv5ly3r4@ms3c3bzxgqqx>
Date: Thu, 25 Jan 2024 23:25:37 +0100
From: Andi Shyti <andi.shyti@...nel.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: Mark Brown <broonie@...nel.org>, arnd@...db.de, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org, alim.akhtar@...sung.com,
linux-spi@...r.kernel.org, linux-samsung-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-arch@...r.kernel.org,
andre.draszik@...aro.org, peter.griffin@...aro.org, semen.protsenko@...aro.org,
kernel-team@...roid.com, willmcvicker@...gle.com
Subject: Re: [PATCH 00/21] spi: s3c64xx: winter cleanup and gs101 support
Hi Tudor,
> >> The patch set cleans a bit the driver and adds support for gs101 SPI.
> >>
> >> Apart of the SPI patches, I added support for iowrite{8,16}_32 accessors
> >> in asm-generic/io.h. This will allow devices that require 32 bits
> >> register accesses to write data in chunks of 8 or 16 bits (a typical use
> >> case is SPI, where clients can request transfers in words of 8 bits for
> >> example). GS101 only allows 32bit register accesses otherwise it raisses
> >> a Serror Interrupt and hangs the system, thus the accessors are needed
> >> here. If the accessors are fine, I expect they'll be queued either to
> >> the SPI tree or to the ASM header files tree, but by providing an
> >> immutable tag, so that the other tree can merge them too.
> >>
> >> The SPI patches were tested with the spi-loopback-test on the gs101
> >> controller.
> >
> > The reformatting in this series will conflict with the SPI changes in:
> >
> > https://lore.kernel.org/r/20240120012948.8836-1-semen.protsenko@linaro.org
> >
> > Can you please pull those into this series or otherwise coordinate?
>
> ah, I haven't noticed Sam's updates. I'll rebase on top of his set and
> adapt if necessary. I'll review that set in a sec.
it's a long series, please give it a few days before resending
it.
Thanks,
Andi
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