linux-kernel - Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node

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Message-ID: <722d6bdf-9a43-436d-a9e2-4c21e1deb8c3@broadcom.com>
Date: Wed, 24 Jan 2024 21:53:04 -0800
From: William Zhang <william.zhang@...adcom.com>
To: Florian Fainelli <florian.fainelli@...adcom.com>,
 Miquel Raynal <miquel.raynal@...tlin.com>, David Regan <dregan@...adcom.com>
Cc: dregan@...l.com, richard@....at, vigneshr@...com, robh+dt@...nel.org,
 krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
 computersforpeace@...il.com, kdasu.kdev@...il.com,
 linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, joel.peshkin@...adcom.com,
 tomer.yacoby@...adcom.com, dan.beygelman@...adcom.com,
 anand.gore@...adcom.com, kursad.oney@...adcom.com, rafal@...ecki.pl,
 bcm-kernel-feedback-list@...adcom.com, andre.przywara@....com,
 baruch@...s.co.il, linux-arm-kernel@...ts.infradead.org,
 dan.carpenter@...aro.org
Subject: Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller
 node



On 1/24/24 19:34, Florian Fainelli wrote:
> 
> 
> On 1/24/2024 7:09 PM, William Zhang wrote:
>> Hi Miquel,
>>
>> On 1/24/24 09:30, Miquel Raynal wrote:
>>> Hi David,
>>>
>>> dregan@...adcom.com wrote on Tue, 23 Jan 2024 19:04:50 -0800:
>>>
>>>> From: William Zhang <william.zhang@...adcom.com>
>>>>
>>>> Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts
>>>> files.
>>>>
>>>> Signed-off-by: William Zhang <william.zhang@...adcom.com>
>>>> Reviewed-by: David Regan <dregan@...adcom.com>
>>>> ---
>>>> Changes in v3: None
>>>> ---
>>>> Changes in v2: None
>>>> ---
>>>>   arch/arm/boot/dts/broadcom/bcm47622.dtsi    | 17 +++++++++++++++++
>>>>   arch/arm/boot/dts/broadcom/bcm63138.dtsi    | 10 +++++++++-
>>>>   arch/arm/boot/dts/broadcom/bcm63148.dtsi    | 17 +++++++++++++++++
>>>>   arch/arm/boot/dts/broadcom/bcm63178.dtsi    | 17 +++++++++++++++++
>>>>   arch/arm/boot/dts/broadcom/bcm6756.dtsi     | 17 +++++++++++++++++
>>>>   arch/arm/boot/dts/broadcom/bcm6846.dtsi     | 17 +++++++++++++++++
>>>>   arch/arm/boot/dts/broadcom/bcm6855.dtsi     | 17 +++++++++++++++++
>>>>   arch/arm/boot/dts/broadcom/bcm6878.dtsi     | 17 +++++++++++++++++
>>>>   arch/arm/boot/dts/broadcom/bcm947622.dts    |  4 ++++
>>>>   arch/arm/boot/dts/broadcom/bcm963138.dts    |  4 ++++
>>>>   arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 12 +++++-------
>>>>   arch/arm/boot/dts/broadcom/bcm963148.dts    |  4 ++++
>>>>   arch/arm/boot/dts/broadcom/bcm963178.dts    |  4 ++++
>>>>   arch/arm/boot/dts/broadcom/bcm96756.dts     |  4 ++++
>>>>   arch/arm/boot/dts/broadcom/bcm96846.dts     |  4 ++++
>>>>   arch/arm/boot/dts/broadcom/bcm96855.dts     |  4 ++++
>>>>   arch/arm/boot/dts/broadcom/bcm96878.dts     |  4 ++++
>>>>   17 files changed, 165 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi 
>>>> b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
>>>> index 7cd38de118c3..55ff18043d96 100644
>>>> --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi
>>>> +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
>>>> @@ -138,6 +138,23 @@ hsspi: spi@...0 {
>>>>               status = "disabled";
>>>>           };
>>>> +        nand_controller: nand-controller@...0 {
>>>> +            #address-cells = <1>;
>>>> +            #size-cells = <0>;
>>>> +            compatible = "brcm,nand-bcm63138", 
>>>> "brcm,brcmnand-v7.1", "brcm,brcmnand";
>>>> +            reg = <0x1800 0x600>, <0x2000 0x10>;
>>>> +            reg-names = "nand", "nand-int-base";
>>>> +            brcm,nand-use-wp = <0>;
>>>> +            status = "disabled";
>>>> +
>>>> +            nandcs: nand@0 {
>>>> +                compatible = "brcm,nandcs";
>>>> +                reg = <0>;
>>>> +                nand-on-flash-bbt;
>>>> +                brcm,nand-ecc-use-strap;
>>>
>>> Describing the NAND chip in a SoC DTSI does not look relevant to me.
>>> Even more if you add something like this nand-ecc-use-strap setting
>>> which is very board dependent.
>>>
>> I am not sure if I understand you comments correctly but are you 
>> suggesting to put this whole nand controller node into each board dts? 
>> We have other ip block nodes like SPI, uart in this same soc dtsi file 
>> too.  For all the bcmbca soc dtsi I am updating here(and its board 
>> design), we always use the strap to for ecc setting.  So I thought it 
>> should be okay to put brcm,nand-ecc-use-strap in the default dtsi 
>> file. For any board that uses the raw nand nand-ecc property, the 
>> board dts can do so and override the brcm,nand-ecc-use-strap setting.
> 
> I read Miquel's comment as meaning that the nandcs aka the NAND 
> chip/flash part description should be in the board .dts file, while the 
> controller itself can remain in the .dtsi file with its status = 
> "disabled" property.
> 
> Are there customer boards, that is non reference boards that might chose 
> a different chip select number and/or not use the strap settings?
In BCMBCA SoC, there is only one cs and customer design also have to use 
strap for the bootrom to boot up properly.  They can override it with 
dts in linux but I don't think any customer would do that.

Maybe the nand-on-flash-bbt could be possible item that customer may 
have to set it differently if they don't follow our reference software 
design.

I will move the nand-on-flash-bbt to the board dts but I would like to 
keep the other default nandcs settings in SoC.dsti if that is not too 
out of the conventional rule and Miquel is okay with it.

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