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Message-Id: <CYNQHXOZ73YR.3QODFI2X08KC6@bootlin.com>
Date: Thu, 25 Jan 2024 12:01:06 +0100
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: "Krzysztof Kozlowski" <krzysztof.kozlowski@...aro.org>, "Rob Herring"
 <robh@...nel.org>
Cc: "Gregory CLEMENT" <gregory.clement@...tlin.com>, "Michael Turquette"
 <mturquette@...libre.com>, "Stephen Boyd" <sboyd@...nel.org>, "Krzysztof
 Kozlowski" <krzysztof.kozlowski+dt@...aro.org>, "Conor Dooley"
 <conor+dt@...nel.org>, "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
 "Linus Walleij" <linus.walleij@...aro.org>,
 Rafał Miłecki <rafal@...ecki.pl>, "Philipp Zabel"
 <p.zabel@...gutronix.de>, "Vladimir Kondratiev"
 <vladimir.kondratiev@...ileye.com>, <linux-mips@...r.kernel.org>,
 <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
 <linux-kernel@...r.kernel.org>, "Thomas Petazzoni"
 <thomas.petazzoni@...tlin.com>, "Tawfik Bayouk"
 <tawfik.bayouk@...ileye.com>, <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v3 04/17] dt-bindings: soc: mobileye: add EyeQ5 OLB
 system controller

Hello,

On Thu Jan 25, 2024 at 8:51 AM CET, Krzysztof Kozlowski wrote:
> On 24/01/2024 16:14, Rob Herring wrote:
> >> +
> >> +      pinctrl-b {
> >> +        compatible = "mobileye,eyeq5-b-pinctrl";
> >> +        #pinctrl-cells = <1>;
> >> +      };
> >> +    };
> > 
> > This can all be simplified to:
> > 
> > system-controller@...000 {
> >     compatible = "mobileye,eyeq5-olb", "syscon";
> >     reg = <0xe00000 0x400>;
> >     #reset-cells = <2>;
> >     #clock-cells = <1>;
> >     clocks = <&xtal>;
> >     clock-names = "ref";
> > 
> >     pins { ... };
> > };
> > 
> > There is no need for sub nodes unless you have reusable blocks or each 
> > block has its own resources in DT.
>
> Yes, however I believe there should be resources here: each subnode
> should get its address space. This is a bit tied to implementation,
> which currently assumes "everyone can fiddle with everything" in this block.
>
> Theo, can you draw memory map?

It would be a mess. I've counted things up. The first 147 registers are
used in this 0x400 block. There are 31 individual blocks, with 7
registers unused (holes to align next block).

Functions are reset, clocks, LBIST, MBIST, DDR control, GPIO,
accelerator control, CPU entrypoint, PDTrace, IRQs, chip info & ID
stuff, control registers for PCIe / eMMC / Eth / SGMII / DMA / etc.

Some will never get used from Linux, others might. Maybe a moderate
approach would be to create ressources for major blocks and make it
evolve organically, without imposing that all uses lead to a new
ressource creation.

Thanks,

--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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