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Message-ID:
<MA0P287MB2822D37F523A075320BDA99AFE7A2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM>
Date: Thu, 25 Jan 2024 20:15:32 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: AnnanLiu <annan.liu.xdu@...look.com>, chao.wei@...hgo.com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org
Cc: paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] riscv: dts: sophgo: add watchdog dt node for CV1800
hi, Annan, I see another email with same title, any difference between
them two? Which one you want us to review? Maybe you should void one of
them.
On 2024/1/25 17:46, AnnanLiu wrote:
> Add the watchdog device tree node to cv1800 SoC.
>
> Signed-off-by: AnnanLiu <annan.liu.xdu@...look.com>
> ---
> This patch depends on the clk driver and reset driver.
> Clk driver link:
> https://lore.kernel.org/all/IA1PR20MB49539CDAD9A268CBF6CA184BBB9FA@IA1PR20MB4953.namprd20.prod.outlook.com/
> Reset driver link:
> https://lore.kernel.org/all/20231113005503.2423-1-jszhang@kernel.org/
>
> Changes since v1:
> - Change the name of the watchdog from watchdog0 to watchdog.
> - Change the status of watchdog.
> v1 link:
> https://lore.kernel.org/all/DM6PR20MB23160B8499CC2BFDAE6FCACDAB9EA@DM6PR20MB2316.namprd20.prod.outlook.com/
>
>
> arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 4 ++++
> arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 16 ++++++++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> index 3af9e34b3bc7..75469161bfff 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> @@ -36,3 +36,7 @@ &osc {
> &uart0 {
> status = "okay";
> };
> +
> +&watchdog {
> + status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index aec6401a467b..03ca32cd37b6 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -1,6 +1,7 @@
> // SPDX-License-Identifier: (GPL-2.0 OR MIT)
> /*
> * Copyright (C) 2023 Jisheng Zhang <jszhang@...nel.org>
> + * Copyright (C) 2024 Annan Liu <annan.liu.xdu@...look.com>
> */
>
> #include <dt-bindings/interrupt-controller/irq.h>
> @@ -103,6 +104,21 @@ uart4: serial@...0000 {
> status = "disabled";
> };
>
> + watchdog: watchdog@...0000{
> + compatible = "snps,dw-wdt";
> + reg = <0x3010000 0x100>;
> + interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pclk>;
> + resets = <&rst RST_WDT>;
> + status = "disabled";
> + };
> +
> + pclk: pclk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <25000000>;
> + };
> +
> plic: interrupt-controller@...00000 {
> compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
> reg = <0x70000000 0x4000000>;
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