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Message-ID: <20240125025652.GA15039@ranerica-svr.sc.intel.com>
Date: Wed, 24 Jan 2024 18:56:52 -0800
From: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To: x86@...nel.org
Cc: Andreas Herrmann <aherrmann@...e.com>,
Catalin Marinas <catalin.marinas@....com>,
Chen Yu <yu.c.chen@...el.com>, Len Brown <len.brown@...el.com>,
Radu Rendec <rrendec@...hat.com>,
Pierre Gondois <Pierre.Gondois@....com>, Pu Wen <puwen@...on.cn>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Sudeep Holla <sudeep.holla@....com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Will Deacon <will@...nel.org>, Zhang Rui <rui.zhang@...el.com>,
Huang Ying <ying.huang@...el.com>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
stable@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 0/4] x86/cacheinfo: Set the number of leaves per CPU
On Tue, Dec 12, 2023 at 02:25:15PM -0800, Ricardo Neri wrote:
> Hi,
>
> The interface /sys/devices/system/cpu/cpuX/cache is broken (not populated)
> if CPUs have different numbers of subleaves in CPUID 4. This is the case
> of Intel Meteor Lake.
Hello. Wondering if there is any feedback on this patchset. The interface
/sys/devices/system/cpu/cpuX/cache is still broken on Meteor Lake with
v6.8-rc1.
I verified that this patchset applies cleanly on v6.8-rc1.
Thanks and BR,
Ricardo
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