linux-kernel - [PATCH 14/15] iommu/vt-d: Add a helper to retrieve PID address

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Date: Fri, 26 Jan 2024 15:42:36 -0800
From: Jacob Pan <jacob.jun.pan@...ux.intel.com>
To: LKML <linux-kernel@...r.kernel.org>,
	X86 Kernel <x86@...nel.org>,
	Peter Zijlstra <peterz@...radead.org>,
	iommu@...ts.linux.dev,
	Thomas Gleixner <tglx@...utronix.de>,
	"Lu Baolu" <baolu.lu@...ux.intel.com>,
	kvm@...r.kernel.org,
	Dave Hansen <dave.hansen@...el.com>,
	Joerg Roedel <joro@...tes.org>,
	"H. Peter Anvin" <hpa@...or.com>,
	"Borislav Petkov" <bp@...en8.de>,
	"Ingo Molnar" <mingo@...hat.com>
Cc: Paul Luse <paul.e.luse@...el.com>,
	Dan Williams <dan.j.williams@...el.com>,
	Jens Axboe <axboe@...nel.dk>,
	Raj Ashok <ashok.raj@...el.com>,
	"Tian, Kevin" <kevin.tian@...el.com>,
	maz@...nel.org,
	seanjc@...gle.com,
	"Robin Murphy" <robin.murphy@....com>,
	Jacob Pan <jacob.jun.pan@...ux.intel.com>
Subject: [PATCH 14/15] iommu/vt-d: Add a helper to retrieve PID address

From: Thomas Gleixner <tglx@...utronix.de>

Physical address of the Intel posted interrupt descriptor (PID) is needed
when programming interrupt remapping table entry (IRTE) for posted mode.

PID is per-CPU, this patch adds a helper function to retrieve the target
CPU's PID address based on the effective affinity mask of the interrupt.

Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Signed-off-by: Jacob Pan <jacob.jun.pan@...ux.intel.com>

---
v1: Added a warning if the effective affinity mask is not set up
---
 drivers/iommu/intel/irq_remapping.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c
index fa719936b44e..01df65dca1d5 100644
--- a/drivers/iommu/intel/irq_remapping.c
+++ b/drivers/iommu/intel/irq_remapping.c
@@ -19,6 +19,7 @@
 #include <asm/cpu.h>
 #include <asm/irq_remapping.h>
 #include <asm/pci-direct.h>
+#include <asm/posted_intr.h>
 
 #include "iommu.h"
 #include "../irq_remapping.h"
@@ -1126,6 +1127,19 @@ struct irq_remap_ops intel_irq_remap_ops = {
 	.enable_faulting	= enable_drhd_fault_handling,
 };
 
+#ifdef CONFIG_X86_POSTED_MSI
+
+static phys_addr_t get_pi_desc_addr(struct irq_data *irqd)
+{
+	int cpu = cpumask_first(irq_data_get_effective_affinity_mask(irqd));
+
+	if (WARN_ON(cpu >= nr_cpu_ids))
+		return 0;
+
+	return __pa(per_cpu_ptr(&posted_interrupt_desc, cpu));
+}
+#endif
+
 static void intel_ir_reconfigure_irte(struct irq_data *irqd, bool force)
 {
 	struct intel_ir_data *ir_data = irqd->chip_data;
-- 
2.25.1