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Message-ID: <20240126041126.1927228-23-michael.roth@amd.com>
Date: Thu, 25 Jan 2024 22:11:22 -0600
From: Michael Roth <michael.roth@....com>
To: <x86@...nel.org>
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Subject: [PATCH v2 22/25] x86/cpufeatures: Enable/unmask SEV-SNP CPU feature
With all the required host changes in place, it should now be possible
to initialize SNP-related MSR bits, set up RMP table enforcement, and
initialize SNP support in firmware while maintaining legacy support for
SEV/SEV-ES guests. Go ahead and enable the SNP feature now.
Signed-off-by: Michael Roth <michael.roth@....com>
---
arch/x86/include/asm/disabled-features.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 1ea64d4e7021..85a7b5ce96c9 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -117,7 +117,11 @@
#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
#endif
+#ifdef CONFIG_KVM_AMD_SEV
+#define DISABLE_SEV_SNP 0
+#else
#define DISABLE_SEV_SNP (1 << (X86_FEATURE_SEV_SNP & 31))
+#endif
/*
* Make sure to add features to the correct mask
--
2.25.1
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