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Message-ID: <CAPLW+4mL1gb_R8PhKaMhwOUTa0GDqat_9W=348ScYj+hBarQJg@mail.gmail.com>
Date: Fri, 26 Jan 2024 21:30:39 -0600
From: Sam Protsenko <semen.protsenko@...aro.org>
To: André Draszik <andre.draszik@...aro.org>
Cc: peter.griffin@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
linux-kernel@...r.kernel.org, kernel-team@...roid.com,
tudor.ambarus@...aro.org, willmcvicker@...gle.com, alim.akhtar@...sung.com,
s.nawrocki@...sung.com, tomasz.figa@...il.com, cw00.choi@...sung.com,
mturquette@...libre.com, sboyd@...nel.org,
linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 5/5] clk: samsung: gs101: don't mark non-essential clocks
as critical
On Fri, Jan 26, 2024 at 6:37 PM André Draszik <andre.draszik@...aro.org> wrote:
>
> The peric0_top1_ipclk_0 and peric0_top1_pclk_0 are the clocks going to
> peric0/uart_usi, with pclk being the bus clock. Without pclk running,
> any bus access will hang.
Empty line is missing here?
> Unfortunately, in commit d97b6c902a40 ("arm64: dts: exynos: gs101:
> update USI UART to use peric0 clocks") the gs101 DT ended up specifying
> an incorrect pclkk in the respective node and instead the two clocks
> here were marked as critical.
>
> We have fixed the gs101 DT and can therefore drop this incorrect
> work-around here, the uart driver will claim these clocks as needed.
>
> Note that this commit has the side-effect of causing earlycon to stop
> to work sometime into the boot for two reasons:
> * peric0_top1_ipclk_0 requires its parent gout_cmu_peric0_ip to be
> running, but because earlycon doesn't deal with clocks that
> parent will be disabled when none of the other drivers that
> actually deal with clocks correctly require it to be running and
> the real serial driver (which does deal with clocks) hasn't taken
> over yet
That's weird. Doesn't your bootloader setup serial clocks properly?
AFAIU, earlycon should rely on everything already configured in
bootloader.
> * hand-over between earlycon and serial driver appears to be
> fragile and clocks get enabled and disabled a few times, which
> also causes register access to hang while earlycon is still
> active
> Nonetheless we shouldn't keep these clocks running unconditionally just
> for earlycon. Clocks should be disabled where possible. If earlycon is
> required in the future, e.g. for debug, this commit can simply be
> reverted (locally!).
That sounds... not ideal. The ability to enable earlycon just by
adding some string to bootargs can be very useful for developers.
Maybe just make those clocks CLK_IGNORE_UNUSED, if that keeps earlycon
functional? With corresponding comments of course.
>
> Fixes: 893f133a040b ("clk: samsung: gs101: add support for cmu_peric0")
> Signed-off-by: André Draszik <andre.draszik@...aro.org>
> ---
> drivers/clk/samsung/clk-gs101.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c
> index 61bb0dcf84ee..5c338ac9231c 100644
> --- a/drivers/clk/samsung/clk-gs101.c
> +++ b/drivers/clk/samsung/clk-gs101.c
> @@ -2982,20 +2982,18 @@ static const struct samsung_gate_clock peric0_gate_clks[] __initconst = {
> "gout_peric0_peric0_top0_pclk_9", "mout_peric0_bus_user",
> CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_9,
> 21, 0, 0),
> - /* Disabling this clock makes the system hang. Mark the clock as critical. */
> GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0,
> "gout_peric0_peric0_top1_ipclk_0", "dout_peric0_usi0_uart",
> CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_IPCLK_0,
> - 21, CLK_IS_CRITICAL, 0),
> + 21, 0, 0),
> GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2,
> "gout_peric0_peric0_top1_ipclk_2", "dout_peric0_usi14_usi",
> CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_IPCLK_2,
> 21, 0, 0),
> - /* Disabling this clock makes the system hang. Mark the clock as critical. */
> GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0,
> "gout_peric0_peric0_top1_pclk_0", "mout_peric0_bus_user",
> CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_PCLK_0,
> - 21, CLK_IS_CRITICAL, 0),
> + 21, 0, 0),
> GATE(CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2,
> "gout_peric0_peric0_top1_pclk_2", "mout_peric0_bus_user",
> CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP1_IPCLKPORT_PCLK_2,
> --
> 2.43.0.429.g432eaa2c6b-goog
>
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