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Message-ID: <20240127004321.1902477-2-davidai@google.com>
Date: Fri, 26 Jan 2024 16:43:15 -0800
From: David Dai <davidai@...gle.com>
To: "Rafael J. Wysocki" <rafael@...nel.org>, Viresh Kumar <viresh.kumar@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Sudeep Holla <sudeep.holla@....com>, David Dai <davidai@...gle.com>,
Saravana Kannan <saravanak@...gle.com>
Cc: Quentin Perret <qperret@...gle.com>, Masami Hiramatsu <mhiramat@...gle.com>,
Will Deacon <will@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
Vincent Guittot <vincent.guittot@...aro.org>, Marc Zyngier <maz@...nel.org>,
Oliver Upton <oliver.upton@...ux.dev>, Dietmar Eggemann <dietmar.eggemann@....com>,
Pavan Kondeti <quic_pkondeti@...cinc.com>, Gupta Pankaj <pankaj.gupta@....com>,
Mel Gorman <mgorman@...e.de>, kernel-team@...roid.com, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v5 1/2] dt-bindings: cpufreq: add virtual cpufreq device
Adding bindings to represent a virtual cpufreq device.
Virtual machines may expose MMIO regions for a virtual cpufreq device
for guests to read frequency information or to request frequency
selection. The virtual cpufreq device has an individual controller for
each frequency domain. Performance points for a given domain can be
normalized across all domains for ease of allowing for virtual machines
to migrate between hosts.
Co-developed-by: Saravana Kannan <saravanak@...gle.com>
Signed-off-by: Saravana Kannan <saravanak@...gle.com>
Signed-off-by: David Dai <davidai@...gle.com>
---
.../cpufreq/qemu,cpufreq-virtual.yaml | 110 ++++++++++++++++++
1 file changed, 110 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/qemu,cpufreq-virtual.yaml
diff --git a/Documentation/devicetree/bindings/cpufreq/qemu,cpufreq-virtual.yaml b/Documentation/devicetree/bindings/cpufreq/qemu,cpufreq-virtual.yaml
new file mode 100644
index 000000000000..cd617baf75e7
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/qemu,cpufreq-virtual.yaml
@@ -0,0 +1,110 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/cpufreq/qemu,cpufreq-virtual.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Virtual CPUFreq
+
+maintainers:
+ - David Dai <davidai@...gle.com>
+ - Saravana Kannan <saravanak@...gle.com>
+
+description:
+ Virtual CPUFreq is a virtualized driver in guest kernels that sends frequency
+ selection of its vCPUs as a hint to the host through MMIO regions. Each vCPU
+ is associated with a frequency domain which can be shared with other vCPUs.
+ Each frequency domain has its own set of registers for frequency controls.
+
+properties:
+ compatible:
+ const: qemu,virtual-cpufreq
+
+ reg:
+ maxItems: 1
+ description:
+ Address and size of region containing frequency controls for each of the
+ frequency domains. Regions for each frequency domain is placed
+ contiguously and contain registers for controlling DVFS(Dynamic Frequency
+ and Voltage) characteristics. The size of the region is proportional to
+ total number of frequency domains. This device also needs the CPUs to
+ list their OPPs using operating-points-v2 tables. The OPP tables for the
+ CPUs should use normalized "frequency" values where the OPP with the
+ highest performance among all the vCPUs is listed as 1024 KHz. The rest
+ of the frequencies of all the vCPUs should be normalized based on their
+ performance relative to that 1024 KHz OPP. This makes it much easier to
+ migrate the VM across systems which might have different physical CPU
+ OPPs.
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ // This example shows a two CPU configuration with a frequency domain
+ // for each CPU showing normalized performance points.
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0>;
+ operating-points-v2 = <&opp_table0>;
+ };
+
+ cpu@1 {
+ compatible = "arm,armv8";
+ device_type = "cpu";
+ reg = <0x0>;
+ operating-points-v2 = <&opp_table1>;
+ };
+ };
+
+ opp_table0: opp-table-0 {
+ compatible = "operating-points-v2";
+
+ opp64000 { opp-hz = /bits/ 64 <64000>; };
+ opp128000 { opp-hz = /bits/ 64 <128000>; };
+ opp192000 { opp-hz = /bits/ 64 <192000>; };
+ opp256000 { opp-hz = /bits/ 64 <256000>; };
+ opp320000 { opp-hz = /bits/ 64 <320000>; };
+ opp384000 { opp-hz = /bits/ 64 <384000>; };
+ opp425000 { opp-hz = /bits/ 64 <425000>; };
+ };
+
+ opp_table1: opp-table-1 {
+ compatible = "operating-points-v2";
+
+ opp64000 { opp-hz = /bits/ 64 <64000>; };
+ opp128000 { opp-hz = /bits/ 64 <128000>; };
+ opp192000 { opp-hz = /bits/ 64 <192000>; };
+ opp256000 { opp-hz = /bits/ 64 <256000>; };
+ opp320000 { opp-hz = /bits/ 64 <320000>; };
+ opp384000 { opp-hz = /bits/ 64 <384000>; };
+ opp448000 { opp-hz = /bits/ 64 <448000>; };
+ opp512000 { opp-hz = /bits/ 64 <512000>; };
+ opp576000 { opp-hz = /bits/ 64 <576000>; };
+ opp640000 { opp-hz = /bits/ 64 <640000>; };
+ opp704000 { opp-hz = /bits/ 64 <704000>; };
+ opp768000 { opp-hz = /bits/ 64 <768000>; };
+ opp832000 { opp-hz = /bits/ 64 <832000>; };
+ opp896000 { opp-hz = /bits/ 64 <896000>; };
+ opp960000 { opp-hz = /bits/ 64 <960000>; };
+ opp1024000 { opp-hz = /bits/ 64 <1024000>; };
+
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpufreq@...0000 {
+ compatible = "qemu,virtual-cpufreq";
+ reg = <0x1040000 0x10>;
+ };
+ };
--
2.43.0.429.g432eaa2c6b-goog
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