lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <3dev6ez4iovtigj5felmwhascaaupzzptwz5wfoag7ml7knlmj@arnddy2jaqxz>
Date: Sat, 27 Jan 2024 17:19:59 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Chukun Pan <amadeus@....edu.cn>
Cc: Konrad Dybcio <konrad.dybcio@...aro.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Rob Herring <robh+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org, 
	devicetree@...r.kernel.org
Subject: Re: [PATCH v3 2/2] arm64: dts: qcom: ipq6018: enable sdhci node

On Thu, Jan 18, 2024 at 09:30:22PM +0800, Chukun Pan wrote:
> Enable mmc device found on ipq6018 devices.
> This node supports both eMMC and SD cards.
> 
> Tested with:
>   eMMC (HS200)
>   SD Card (SDR50/SDR104)
> 
> Signed-off-by: Chukun Pan <amadeus@....edu.cn>
> ---
>  arch/arm64/boot/dts/qcom/ipq6018.dtsi | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index 322eced0b876..420c192bccd9 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -441,6 +441,25 @@ dwc_1: usb@...0000 {
>  			};
>  		};
>  
> +		sdhc: mmc@...4000 {
> +			compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5";
> +			reg = <0x0 0x7804000 0x0 0x1000>,
> +			      <0x0 0x7805000 0x0 0x1000>;
> +			reg-names = "hc", "cqhci";
> +
> +			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "hc_irq", "pwr_irq";
> +
> +			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
> +				 <&gcc GCC_SDCC1_APPS_CLK>,
> +				 <&xo>;
> +			clock-names = "iface", "core", "xo";
> +			resets = <&gcc GCC_SDCC1_BCR>;
> +			max-frequency = <192000000>;
> +			status = "disabled";

Subject and commit message says "enable", but this says disable. Could
you change this to "Add" instead?

Do you have a patch for any board where this is actually enabled?
Perhaps you missed a 3rd patch that enables this and uses the ipq6018_l2
regulator you add in patch 1?

Regards,
Bjorn

> +		};
> +
>  		blsp_dma: dma-controller@...4000 {
>  			compatible = "qcom,bam-v1.7.0";
>  			reg = <0x0 0x07884000 0x0 0x2b000>;
> -- 
> 2.25.1
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ