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Message-ID: <20240129-magical-unclaimed-e725e2491ccb@spud>
Date: Mon, 29 Jan 2024 17:30:30 +0000
From: Conor Dooley <conor@...nel.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Biju Das <biju.das.jz@...renesas.com>,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 1/5] dt-bindings: interrupt-controller:
renesas,rzg2l-irqc: Document RZ/Five SoC
On Mon, Jan 29, 2024 at 03:16:14PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Document RZ/Five (R9A07G043F) IRQC bindings. The IRQC block on RZ/Five SoC
> is almost identical to one found on the RZ/G2L SoC with below differences,
> * Additional BUS error interrupt
> * Additional ECCRAM error interrupt
> * Has additional mask control registers for NMI/IRQ/TINT
>
> Hence new compatible string "renesas,r9a07g043f-irqc" is added for RZ/Five
> SoC.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> .../renesas,rzg2l-irqc.yaml | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml
> index d3b5aec0a3f7..3abc01e48934 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml
> @@ -23,6 +23,7 @@ properties:
> compatible:
> items:
> - enum:
> + - renesas,r9a07g043f-irqc # RZ/Five
> - renesas,r9a07g043u-irqc # RZ/G2UL
> - renesas,r9a07g044-irqc # RZ/G2{L,LC}
> - renesas,r9a07g054-irqc # RZ/V2L
> @@ -88,6 +89,12 @@ properties:
> - description: GPIO interrupt, TINT30
> - description: GPIO interrupt, TINT31
> - description: Bus error interrupt
> + - description: ECCRAM0 TIE1 interrupt
> + - description: ECCRAM0 TIE2 interrupt
> + - description: ECCRAM0 overflow interrupt
> + - description: ECCRAM1 TIE1 interrupt
> + - description: ECCRAM1 TIE2 interrupt
> + - description: ECCRAM1 overflow interrupt
>
> interrupt-names:
> minItems: 41
> @@ -134,6 +141,12 @@ properties:
> - const: tint30
> - const: tint31
> - const: bus-err
> + - const: eccram0-tie1
> + - const: eccram0-tie2
> + - const: eccram0-ovf
> + - const: eccram1-tie1
> + - const: eccram1-tie2
> + - const: eccram1-ovf
I think the restrictions already in the file become incorrect with this
patch:
- if:
properties:
compatible:
contains:
enum:
- renesas,r9a07g043u-irqc
- renesas,r9a08g045-irqc
then:
properties:
interrupts:
minItems: 42
interrupt-names:
minItems: 42
required:
- interrupt-names
This used to require all 42 interrupts for the two compatibles here
and at least the first 41 otherwise. Now you've increased the number of
interrupts to 48 thereby removing the upper limits on the existing
devices.
Given the commit message, I figure that providing 48 interrupts for
(at least some of) those devices would be incorrect?
Cheers,
Conor.
>
> clocks:
> maxItems: 2
> @@ -180,6 +193,20 @@ allOf:
> required:
> - interrupt-names
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a07g043f-irqc
> + then:
> + properties:
> + interrupts:
> + minItems: 48
> + interrupt-names:
> + minItems: 48
> + required:
> + - interrupt-names
> +
> unevaluatedProperties: false
>
> examples:
> --
> 2.34.1
>
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