linux-kernel - [PATCH v3 5/7] arm64: dts: exynos: gs101: enable cmu-peric1 clock controller

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Message-ID: <20240129174703.1175426-6-andre.draszik@linaro.org>
Date: Mon, 29 Jan 2024 17:46:04 +0000
From: André Draszik <andre.draszik@...aro.org>
To: peter.griffin@...aro.org,
	mturquette@...libre.com,
	sboyd@...nel.org,
	robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org
Cc: linux-kernel@...r.kernel.org,
	kernel-team@...roid.com,
	tudor.ambarus@...aro.org,
	willmcvicker@...gle.com,
	semen.protsenko@...aro.org,
	alim.akhtar@...sung.com,
	s.nawrocki@...sung.com,
	tomasz.figa@...il.com,
	cw00.choi@...sung.com,
	linux-arm-kernel@...ts.infradead.org,
	linux-samsung-soc@...r.kernel.org,
	linux-clk@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: [PATCH v3 5/7] arm64: dts: exynos: gs101: enable cmu-peric1 clock controller

Enable the cmu-peric1 clock controller. It feeds additional USI, I3C
and PWM interfaces / busses.

Note that &sysreg_peric1 needs a clock to be able to access its
registers and now that Linux knows about this clock, we need to add it
in this commit as well so as to keep &sysreg_peric1 working, so that
the clock can be enabled as and when needed.

Signed-off-by: André Draszik <andre.draszik@...aro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
Reviewed-by: Peter Griffin <peter.griffin@...aro.org>

---
v2:
* merge patch #8 from original series version 1 into this patch, i.e.
add the clock to &sysreg_peric1 in this commit & update commit message
* collect Reviewed-by: tags
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index aaac04df5e65..e1bcf490309a 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -429,9 +429,20 @@ serial_0: serial@...00000 {
 			};
 		};
 
+		cmu_peric1: clock-controller@...00000 {
+			compatible = "google,gs101-cmu-peric1";
+			reg = <0x10c00000 0x4000>;
+			#clock-cells = <1>;
+			clocks = <&ext_24_5m>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_IP>;
+			clock-names = "oscclk", "bus", "ip";
+		};
+
 		sysreg_peric1: syscon@...20000 {
 			compatible = "google,gs101-peric1-sysreg", "syscon";
 			reg = <0x10c20000 0x10000>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
 		};
 
 		pinctrl_peric1: pinctrl@...40000 {
-- 
2.43.0.429.g432eaa2c6b-goog