linux-kernel - Re: [V2] i2c: i2c-qcom-geni: Correct I2C TRE sequence

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Message-ID: <lib6m2bty4uilvvu544sjlezeux7ne4cx5i25j6yndicx7miaw@tvxpuekiczwh>
Date: Tue, 30 Jan 2024 00:24:17 +0100
From: Andi Shyti <andi.shyti@...nel.org>
To: Viken Dadhaniya <quic_vdadhani@...cinc.com>, 
	Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Cc: andersson@...nel.org, konrad.dybcio@...aro.org, 
	linux-arm-msm@...r.kernel.org, linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org, 
	vkoul@...nel.org, quic_bjorande@...cinc.com, manivannan.sadhasivam@...aro.org, 
	quic_msavaliy@...cinc.com, quic_vtanuku@...cinc.com
Subject: Re: [V2] i2c: i2c-qcom-geni: Correct I2C TRE sequence

Hi Viken,

as Bryan has done some comments in version 1, please, Cc him to
this patch.

On Mon, Jan 29, 2024 at 11:40:03AM +0530, Viken Dadhaniya wrote:
> For i2c read operation, we are getting gsi mode timeout due
> to malformed TRE(Transfer Ring Element). Currently we are
> configuring incorrect TRE sequence in gpi driver
> (drivers/dma/qcom/gpi.c) as below
> 
> - Sets up CONFIG
> - Sets up DMA tre
> - Sets up GO tre
> 
> As per HPG(Hardware programming guide), We should configure TREs in below
> sequence for any i2c transfer
> 
> - Sets up CONFIG tre
> - Sets up GO tre
> - Sets up DMA tre
> 
> For only write operation or write followed by read operation,
> existing software sequence is correct.
> 
> for only read operation, TRE sequence need to be corrected.
> Hence, we have changed the sequence to submit GO tre before DMA tre.
> 
> Tested covering i2c read/write transfer on QCM6490 RB3 board.
> 
> Signed-off-by: Viken Dadhaniya <quic_vdadhani@...cinc.com>
> Fixes: commit d8703554f4de ("i2c: qcom-geni: Add support for GPI DMA")

The format is:

Fixes: d8703554f4de ("i2c: qcom-geni: Add support for GPI DMA")

and goes above the SoB.

> ---
> v1 -> v2:
> - Remove redundant check.
> - update commit log.
> - add fix tag.
> ---
> ---
>  drivers/i2c/busses/i2c-qcom-geni.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
> index 0d2e7171e3a6..da94df466e83 100644
> --- a/drivers/i2c/busses/i2c-qcom-geni.c
> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
> @@ -613,20 +613,20 @@ static int geni_i2c_gpi_xfer(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], i
>  
>  		peripheral.addr = msgs[i].addr;
>  
> +		ret =  geni_i2c_gpi(gi2c, &msgs[i], &config,
> +				    &tx_addr, &tx_buf, I2C_WRITE, gi2c->tx_c);
> +		if (ret)
> +			goto err;
> +
>  		if (msgs[i].flags & I2C_M_RD) {
>  			ret =  geni_i2c_gpi(gi2c, &msgs[i], &config,
>  					    &rx_addr, &rx_buf, I2C_READ, gi2c->rx_c);
>  			if (ret)
>  				goto err;
> -		}
> -
> -		ret =  geni_i2c_gpi(gi2c, &msgs[i], &config,
> -				    &tx_addr, &tx_buf, I2C_WRITE, gi2c->tx_c);
> -		if (ret)
> -			goto err;
>  
> -		if (msgs[i].flags & I2C_M_RD)
>  			dma_async_issue_pending(gi2c->rx_c);
> +		}
> +

Bryan, could you please check here?

Thanks for your review!

Andi