linux-kernel - Re: [PATCH v2] mmc: renesas_sdhi: Fix change point of data handling

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Message-ID: <ZbeEPg1jc5qWJa5m@ninjato>
Date: Mon, 29 Jan 2024 11:55:58 +0100
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: ulf.hansson@...aro.org, takeshi.saito.xv@...esas.com,
	masaharu.hayakawa.ry@...esas.com, yoshihiro.shimoda.uh@...esas.com,
	linux-mmc@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH v2] mmc: renesas_sdhi: Fix change point of data handling

Hi Claudiu,

but one thing I can ask already:

> Investigating it on RZ/G3S lead to the conclusion that every time the issue
> is reproduced all the probed TAPs are OK. According to datasheet, when this
> happens the change point of data need to be considered for tuning.

Yes, "considered" means here it should be *avoided*.

> Previous code considered the change point of data happens when the content
> of the SMPCMP register is zero. According to RZ/V2M hardware manual,

When SMPCMP is zero, there is *no* change point. Which is good.

> chapter "Change Point of the Input Data" (as this is the most clear
> description that I've found about change point of the input data and all
> RZ hardware manual are similar on this chapter),

I also have a chapter named like this. If you check the diagram, change
point is between TAP2 and 3, so the suggested TAP to use is 6 or 7. As
far away as possible from the change point.

> at the time of tuning,
> data is captured by the previous and next TAPs and the result is stored in
> the SMPCMP register (previous TAP in bits 22..16, next TAP in bits 7..0).
> If there is a mismatch b/w the previous and the next TAPs, it indicates
> that there is a change point of the input data.

This is correct.

> To comply with this, the code checks if this mismatch is present and
> updates the priv->smpcmp mask.

That means you select the "change point" instead of avoiding it?

> This change has been checked on the devices with the following DTSes by
> doing 50 consecutive reboots and checking for the tuning failure message:

Okay, you might not have a failure message, but you might have selected
the worst TAP. Or?

> +			if (cmpngu_data != cmpngd_data)
> +				set_bit(i, priv->smpcmp);

Really looks like you select the change point instead of avoiding it.

However, with some SD cards, I also see the EIO error you see. So, there
might be room to improve TAP selection when all TAPs are good. I need to
check if this is really is the same case for the SD cards in question.

Happy hacking,

   Wolfram


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