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Message-ID: <20240129152432.GE22617@thinkpad>
Date: Mon, 29 Jan 2024 20:54:32 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Krishna chaitanya chundru <quic_krichai@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Johan Hovold <johan+linaro@...nel.org>,
Brian Masney <bmasney@...hat.com>,
Georgi Djakov <djakov@...nel.org>, linux-arm-msm@...r.kernel.org,
vireshk@...nel.org, quic_vbadigan@...cinc.com,
quic_skananth@...cinc.com, quic_nitegupt@...cinc.com,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 2/6] arm64: dts: qcom: sm8450: Add interconnect path
to PCIe node
On Fri, Jan 12, 2024 at 07:52:01PM +0530, Krishna chaitanya chundru wrote:
> Add pcie-mem & cpu-pcie interconnect path to the PCIe nodes.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
- Mani
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 01e4dfc4babd..6b1d2e0d9d14 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -1781,6 +1781,10 @@ pcie0: pcie@...0000 {
> <0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
> <0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
>
> + interconnects = <&pcie_noc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>,
> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
> + interconnect-names = "pcie-mem", "cpu-pcie";
> +
> clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
> <&gcc GCC_PCIE_0_PIPE_CLK_SRC>,
> <&pcie0_phy>,
> @@ -1890,6 +1894,10 @@ pcie1: pcie@...8000 {
> <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
> <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
>
> + interconnects = <&pcie_noc MASTER_PCIE_1 0 &mc_virt SLAVE_EBI1 0>,
> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_1 0>;
> + interconnect-names = "pcie-mem", "cpu-pcie";
> +
> clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
> <&gcc GCC_PCIE_1_PIPE_CLK_SRC>,
> <&pcie1_phy>,
>
> --
> 2.42.0
>
--
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