[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240130152547.272125-3-Frank.Li@nxp.com>
Date: Tue, 30 Jan 2024 10:25:47 -0500
From: Frank Li <Frank.Li@....com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE),
linux-kernel@...r.kernel.org (open list)
Cc: imx@...ts.linux.dev
Subject: [PATCH v2 3/3] arm64: dts: imx8dxl-evk: add flexcan2 and flecan3
Add flexcan2 and flexcan3 for imx8dxl-evk board.
Signed-off-by: Frank Li <Frank.Li@....com>
---
Notes:
Change from v1 to v2
-none
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 44da3cc331d84..2123d431e0613 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -81,6 +81,24 @@ reg_fec1_io: regulator-2 {
status = "disabled";
};
+ reg_can0_stby: regulator-4 {
+ compatible = "regulator-fixed";
+ regulator-name = "can0-stby";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pca6416_3 0 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_can1_stby: regulator-5 {
+ compatible = "regulator-fixed";
+ regulator-name = "can1-stby";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pca6416_3 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
reg_usdhc2_vmmc: regulator-3 {
compatible = "regulator-fixed";
regulator-name = "SD1_SPWR";
@@ -322,6 +340,20 @@ &lpuart0 {
status = "okay";
};
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ xceiver-supply = <®_can0_stby>;
+ status = "okay";
+};
+
+&flexcan3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan3>;
+ xceiver-supply = <®_can1_stby>;
+ status = "okay";
+};
+
&lsio_gpio4 {
status = "okay";
};
@@ -491,6 +523,20 @@ IMX8DXL_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 0x06000021
>;
};
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ IMX8DXL_UART2_TX_ADMA_FLEXCAN1_TX 0x00000021
+ IMX8DXL_UART2_RX_ADMA_FLEXCAN1_RX 0x00000021
+ >;
+ };
+
+ pinctrl_flexcan3: flexcan3grp {
+ fsl,pins = <
+ IMX8DXL_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x00000021
+ IMX8DXL_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x00000021
+ >;
+ };
+
pinctrl_fec1: fec1grp {
fsl,pins = <
IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0
--
2.34.1
Powered by blists - more mailing lists