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Message-ID: <20240130065259.GD32821@thinkpad>
Date: Tue, 30 Jan 2024 12:22:59 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH RESEND v2 1/2] dt-bindings: PCI: qcom: Document the
X1E80100 PCIe Controller
On Mon, Jan 29, 2024 at 04:41:19PM +0200, Abel Vesa wrote:
> Document the PCIe Controllers on the X1E80100 platform. They are similar
> to the ones found on SM8550, but they don't have SF QTB clock.
>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
- Mani
> ---
> .../devicetree/bindings/pci/qcom,pcie.yaml | 29 ++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index a93ab3b54066..7381e38b7398 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -41,6 +41,7 @@ properties:
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> - qcom,pcie-sm8550
> + - qcom,pcie-x1e80100
> - items:
> - enum:
> - qcom,pcie-sm8650
> @@ -227,6 +228,7 @@ allOf:
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> - qcom,pcie-sm8550
> + - qcom,pcie-x1e80100
> then:
> properties:
> reg:
> @@ -826,6 +828,32 @@ allOf:
> items:
> - const: pci # PCIe core reset
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-x1e80100
> + then:
> + properties:
> + clocks:
> + maxItems: 7
> + clock-names:
> + items:
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: noc_aggr # Aggre NoC PCIe AXI clock
> + - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
> + resets:
> + maxItems: 2
> + reset-names:
> + items:
> + - const: pci # PCIe core reset
> + - const: link_down # PCIe link down reset
> +
> - if:
> properties:
> compatible:
> @@ -884,6 +912,7 @@ allOf:
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> - qcom,pcie-sm8550
> + - qcom,pcie-x1e80100
> then:
> oneOf:
> - properties:
>
> --
> 2.34.1
>
--
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