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Message-ID: <354b72d7-ea53-4686-bfa6-023c632d8edd@linaro.org>
Date: Tue, 30 Jan 2024 09:11:48 +0000
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: André Draszik <andre.draszik@...aro.org>,
peter.griffin@...aro.org, mturquette@...libre.com, sboyd@...nel.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org
Cc: linux-kernel@...r.kernel.org, kernel-team@...roid.com,
willmcvicker@...gle.com, semen.protsenko@...aro.org,
alim.akhtar@...sung.com, s.nawrocki@...sung.com, tomasz.figa@...il.com,
cw00.choi@...sung.com, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v3 6/7] arm64: dts: exynos: gs101: define USI12 with I2C
configuration
On 1/29/24 17:46, André Draszik wrote:
> On the gs101-oriole board, i2c bus 12 has various USB-related
> controllers attached to it.
>
> Note the selection of the USI protocol is intentionally left for the
> board dts file.
>
> Signed-off-by: André Draszik <andre.draszik@...aro.org>
> Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@...aro.org>
>
> ---
> v2:
> * reorder pinctrl-0 & pinctrl-names
> * collect Reviewed-by: tags
> ---
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 30 ++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index e1bcf490309a..9876ecae0ad8 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -451,6 +451,36 @@ pinctrl_peric1: pinctrl@...40000 {
> interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
> };
>
> + usi12: usi@...500c0 {
> + compatible = "google,gs101-usi",
> + "samsung,exynos850-usi";
> + reg = <0x10d500c0 0x20>;
> + ranges;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
> + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
> + clock-names = "pclk", "ipclk";
> + samsung,sysreg = <&sysreg_peric1 0x1010>;
> + samsung,mode = <USI_V2_NONE>;
> + status = "disabled";
> +
> + hsi2c_12: i2c@...50000 {
> + compatible = "google,gs101-hsi2c",
> + "samsung,exynosautov9-hsi2c";
> + reg = <0x10d50000 0xc0>;
> + interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-0 = <&hsi2c12_bus>;
> + pinctrl-names = "default";
> + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
> + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
> + clock-names = "hsi2c", "hsi2c_pclk";
> + status = "disabled";
> + };
> + };
> +
> pinctrl_hsi1: pinctrl@...40000 {
> compatible = "google,gs101-pinctrl";
> reg = <0x11840000 0x00001000>;
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