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Message-ID: <20240130093812.1746512-7-andre.draszik@linaro.org>
Date: Tue, 30 Jan 2024 09:36:45 +0000
From: André Draszik <andre.draszik@...aro.org>
To: peter.griffin@...aro.org,
mturquette@...libre.com,
sboyd@...nel.org,
robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org
Cc: linux-kernel@...r.kernel.org,
kernel-team@...roid.com,
tudor.ambarus@...aro.org,
willmcvicker@...gle.com,
semen.protsenko@...aro.org,
alim.akhtar@...sung.com,
s.nawrocki@...sung.com,
tomasz.figa@...il.com,
cw00.choi@...sung.com,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
André Draszik <andre.draszik@...aro.org>
Subject: [PATCH v2 6/6] arm64: dts: exynos: gs101: reorder hsi2c_8 pinctrl-* properties
The preferred order for these is pinctrl-0 pinctrl-names.
Update the DTSI accordingly.
Signed-off-by: André Draszik <andre.draszik@...aro.org>
Suggested-by: Sam Protsenko <semen.protsenko@...aro.org>
---
v2: new patch in this series
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index f93e937d2726..195533fe04c6 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -394,8 +394,8 @@ hsi2c_8: i2c@...70000 {
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
pinctrl-0 = <&hsi2c8_bus>;
+ pinctrl-names = "default";
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
--
2.43.0.429.g432eaa2c6b-goog
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