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Message-ID: <txbi7hpta26tdncbjyyyxmayos7kw7qbo6y5lcxp2nfk3hogxv@pddv45eqyc2b>
Date: Tue, 30 Jan 2024 10:42:57 +0100
From: Andi Shyti <andi.shyti@...nel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Viken Dadhaniya <quic_vdadhani@...cinc.com>, andersson@...nel.org,
konrad.dybcio@...aro.org, linux-arm-msm@...r.kernel.org, linux-i2c@...r.kernel.org,
linux-kernel@...r.kernel.org, vkoul@...nel.org, quic_bjorande@...cinc.com,
manivannan.sadhasivam@...aro.org, quic_msavaliy@...cinc.com, quic_vtanuku@...cinc.com
Subject: Re: [V2] i2c: i2c-qcom-geni: Correct I2C TRE sequence
Hi Dmitry,
thanks a lot for your review!
On Tue, Jan 30, 2024 at 01:49:57AM +0200, Dmitry Baryshkov wrote:
> On Mon, 29 Jan 2024 at 08:10, Viken Dadhaniya <quic_vdadhani@...cinc.com> wrote:
> >
> > For i2c read operation, we are getting gsi mode timeout due
> > to malformed TRE(Transfer Ring Element). Currently we are
> > configuring incorrect TRE sequence in gpi driver
> > (drivers/dma/qcom/gpi.c) as below
> >
> > - Sets up CONFIG
> > - Sets up DMA tre
> > - Sets up GO tre
> >
> > As per HPG(Hardware programming guide), We should configure TREs in below
> > sequence for any i2c transfer
> >
> > - Sets up CONFIG tre
> > - Sets up GO tre
> > - Sets up DMA tre
>
> It is not clear how this is relevant and/or affected by swapping
> I2C_WRITE and I2C_READ gpi calls.
>
> >
> > For only write operation or write followed by read operation,
> > existing software sequence is correct.
> >
> > for only read operation, TRE sequence need to be corrected.
> > Hence, we have changed the sequence to submit GO tre before DMA tre.
> >
> > Tested covering i2c read/write transfer on QCM6490 RB3 board.
>
> Please read Documentation/process/submitting-patches.rst, understand
> it and write a proper commit message.
>
> >
> > Signed-off-by: Viken Dadhaniya <quic_vdadhani@...cinc.com>
> > Fixes: commit d8703554f4de ("i2c: qcom-geni: Add support for GPI DMA")
>
> As it was pointed out, this line shows ignorance of the mentioned file
> and of the existing community practices.
If the issue is only in the commit message Viken can propose a
proper commit message as reply to this e-mail and I can fix it
before merging the change.
Important is that no issue is seen in the code.
Please, Viken, can you either send a v3 with a proper commit
message or write it in the reply to this e-mail with the changes
that Dmitry suggested.
> > ---
> > v1 -> v2:
> > - Remove redundant check.
> > - update commit log.
> > - add fix tag.
> > ---
> > ---
> > drivers/i2c/busses/i2c-qcom-geni.c | 14 +++++++-------
> > 1 file changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
> > index 0d2e7171e3a6..da94df466e83 100644
> > --- a/drivers/i2c/busses/i2c-qcom-geni.c
> > +++ b/drivers/i2c/busses/i2c-qcom-geni.c
> > @@ -613,20 +613,20 @@ static int geni_i2c_gpi_xfer(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], i
> >
> > peripheral.addr = msgs[i].addr;
> >
> > + ret = geni_i2c_gpi(gi2c, &msgs[i], &config,
> > + &tx_addr, &tx_buf, I2C_WRITE, gi2c->tx_c);
> > + if (ret)
> > + goto err;
> > +
> > if (msgs[i].flags & I2C_M_RD) {
> > ret = geni_i2c_gpi(gi2c, &msgs[i], &config,
> > &rx_addr, &rx_buf, I2C_READ, gi2c->rx_c);
> > if (ret)
> > goto err;
> > - }
> > -
> > - ret = geni_i2c_gpi(gi2c, &msgs[i], &config,
> > - &tx_addr, &tx_buf, I2C_WRITE, gi2c->tx_c);
> > - if (ret)
> > - goto err;
> >
> > - if (msgs[i].flags & I2C_M_RD)
> > dma_async_issue_pending(gi2c->rx_c);
> > + }
> > +
> > dma_async_issue_pending(gi2c->tx_c);
> >
> > timeout = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
> > --
> > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> > of Code Aurora Forum, hosted by The Linux Foundation
If you are going to submit again, please make also sure that the
e-mail is formatted properly.
I'm not sure that this footer will be accepted by git.
Thanks,
Andi
> >
> >
>
>
> --
> With best wishes
> Dmitry
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