linux-kernel - Re: [PATCH v2] dt-bindings: misc: xlnx,sd-fec: convert bindings to yaml

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Message-ID: <d490aa68-c0b2-4741-aed1-2b97766bb7e9@linaro.org>
Date: Tue, 30 Jan 2024 12:29:49 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: "Cvetic, Dragan" <dragan.cvetic@....com>, Rob Herring <robh@...nel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Rob Herring <robh+dt@...nel.org>, "Simek, Michal" <michal.simek@....com>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>, Jonathan Corbet <corbet@....net>,
 "Kiernan, Derek" <derek.kiernan@....com>,
 "moderated list:ARM/ZYNQ ARCHITECTURE"
 <linux-arm-kernel@...ts.infradead.org>,
 "open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
 open list <linux-kernel@...r.kernel.org>, "Erim, Salih"
 <Salih.Erim@....com>, Conor Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH v2] dt-bindings: misc: xlnx,sd-fec: convert bindings to
 yaml

On 30/01/2024 12:07, Cvetic, Dragan wrote:
> Hi Rob, 
> 
>> -----Original Message-----
>> From: Rob Herring <robh@...nel.org>
>> Sent: Monday, January 29, 2024 10:21 PM
>> To: Cvetic, Dragan <dragan.cvetic@....com>
>> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>; Rob Herring
>> <robh+dt@...nel.org>; Simek, Michal <michal.simek@....com>; open
>> list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
>> <devicetree@...r.kernel.org>; Jonathan Corbet <corbet@....net>; Kiernan,
>> Derek <derek.kiernan@....com>; moderated list:ARM/ZYNQ ARCHITECTURE
>> <linux-arm-kernel@...ts.infradead.org>; open list:DOCUMENTATION <linux-
>> doc@...r.kernel.org>; open list <linux-kernel@...r.kernel.org>; Erim, Salih
>> <Salih.Erim@....com>; Conor Dooley <conor+dt@...nel.org>
>> Subject: Re: [PATCH v2] dt-bindings: misc: xlnx,sd-fec: convert bindings to
>> yaml
>>
>>
>> On Mon, 29 Jan 2024 17:18:51 +0000, Dragan Cvetic wrote:
>>> Convert AMD (Xilinx) sd-fec bindings to yaml format, so it can validate
>>> dt-entries as well as any future additions to yaml.
>>> Change in clocks is due to IP is itself configurable and
>>> only the first two clocks are in all combinations. The last
>>> 6 clocks can be present in some of them. It means order is
>>> not really fixed and any combination is possible.
>>> Interrupt may or may not be present.
>>> The documentation for sd-fec bindings is now YAML, so update the
>>> MAINTAINERS file.
>>> Update the link to the new yaml file in xilinx_sdfec.rst.
>>>
>>> Signed-off-by: Dragan Cvetic <dragan.cvetic@....com>
>>> ---
>>> Changes in v2:
>>> ---
>>> Drop clocks description.
>>> Use "contains:" with enum for optional clock-names and update
>>> comment explaining diference from the original DT binding file.
>>> Remove trailing full stops.
>>> Add more details in sdfec-code description.
>>> Set sdfec-code to "string" not "string-array"
>>> ---
>>>  .../devicetree/bindings/misc/xlnx,sd-fec.txt  |  58 --------
>>>  .../devicetree/bindings/misc/xlnx,sd-fec.yaml | 136 ++++++++++++++++++
>>>  Documentation/misc-devices/xilinx_sdfec.rst   |   2 +-
>>>  MAINTAINERS                                   |   2 +-
>>>  4 files changed, 138 insertions(+), 60 deletions(-)
>>>  delete mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-
>> fec.txt
>>>  create mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-
>> fec.yaml
>>>
>>
>> My bot found errors running 'make DT_CHECKER_FLAGS=-m
>> dt_binding_check'
> 
> 
> Accepted, will do it.

There is nothing to accept here, but instead please test your patches
*before* sending them.

Best regards,
Krzysztof