linux-kernel - Re: [PATCH v4 4/4] membarrier: riscv: Provide core serializing command

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Message-ID: <8325617c-51a4-4747-8082-befe9ff1c0f3@efficios.com>
Date: Wed, 31 Jan 2024 10:33:59 -0500
From: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
To: Andrea Parri <parri.andrea@...il.com>, paul.walmsley@...ive.com,
 palmer@...belt.com, aou@...s.berkeley.edu, paulmck@...nel.org, corbet@....net
Cc: mmaas@...gle.com, hboehm@...gle.com, striker@...ibm.com,
 charlie@...osinc.com, rehn@...osinc.com, rdunlap@...radead.org,
 sorear@...tmail.com, linux-riscv@...ts.infradead.org,
 linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 4/4] membarrier: riscv: Provide core serializing
 command

On 2024-01-31 09:49, Andrea Parri wrote:
> RISC-V uses xRET instructions on return from interrupt and to go back
> to user-space; the xRET instruction is not core serializing.
> 
> Use FENCE.I for providing core serialization as follows:
> 
>   - by calling sync_core_before_usermode() on return from interrupt (cf.
>     ipi_sync_core()),
> 
>   - via switch_mm() and sync_core_before_usermode() (respectively, for
>     uthread->uthread and kthread->uthread transitions) before returning
>     to user-space.
> 
> On RISC-V, the serialization in switch_mm() is activated by resetting
> the icache_stale_mask of the mm at prepare_sync_core_cmd().
> 
> Suggested-by: Palmer Dabbelt <palmer@...belt.com>
> Signed-off-by: Andrea Parri <parri.andrea@...il.com>

Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>

-- 
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com