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Message-ID: <CACRpkdb+aWL-NU36dF6urL3T9gUROQX=9-L7aUC=+GM8x+bArA@mail.gmail.com>
Date: Wed, 31 Jan 2024 21:44:42 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Théo Lebrun <theo.lebrun@...tlin.com>
Cc: Gregory CLEMENT <gregory.clement@...tlin.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>, Rafał Miłecki <rafal@...ecki.pl>,
Philipp Zabel <p.zabel@...gutronix.de>,
Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>, linux-mips@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Tawfik Bayouk <tawfik.bayouk@...ileye.com>, linux-gpio@...r.kernel.org
Subject: Re: [PATCH v4 00/18] Add support for Mobileye EyeQ5 system controller
Hi Theo,
thanks for your patches!
A *new* MIPS platform, not every day I see this!
On Wed, Jan 31, 2024 at 5:27 PM Théo Lebrun <theo.lebrun@...tlin.com> wrote:
> Pin control is about controlling bias, drive strength and muxing. The
> latter allows two functions per pin; the first function is always GPIO
> while the second one is pin-dependent. There exists two banks, each
> handled in a separate driver instance. Each pin maps to one pin group.
> That makes pin & group indexes the same, simplifying logic.
Can the three pin control patches be merged separately? (It looks like.)
That would make my job easier when we ge there.
I will try to look closer at each patch!
Yours,
Linus Walleij
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