linux-kernel - [PATCH 1/6] PCI: Add INTx Mechanism Messages macros

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Message-Id: <20240130-pme_msg-v1-1-d52b0add5c7c@nxp.com>
Date: Tue, 30 Jan 2024 19:45:26 -0500
From: Frank Li <Frank.Li@....com>
To: Bjorn Helgaas <bhelgaas@...gle.com>, Jingoo Han <jingoohan1@...il.com>, 
 Gustavo Pimentel <gustavo.pimentel@...opsys.com>, 
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, 
 Lorenzo Pieralisi <lpieralisi@...nel.org>, 
 Krzysztof Wilczyński <kw@...ux.com>, 
 Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, 
 Conor Dooley <conor+dt@...nel.org>, imx@...ts.linux.dev
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org, 
 devicetree@...r.kernel.org, Frank Li <Frank.Li@....com>, 
 Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>, 
 Serge Semin <fancer.lancer@...il.com>
Subject: [PATCH 1/6] PCI: Add INTx Mechanism Messages macros

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>

Add "Message Routing" and "INTx Mechanism Messages" macros to enable
a PCIe driver to send messages for INTx Interrupt Signaling.

The "Message Routing" is from Table 2-17, and the "INTx Mechanism
Messages" is from Table 2-18 on the PCI Express Base Specification,
Rev. 4.0 Version 1.0.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
Reviewed-by: Serge Semin <fancer.lancer@...il.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Signed-off-by: Frank Li <Frank.Li@....com>
---
 drivers/pci/pci.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 2336a8d1edab2..fe42f5d10b010 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -22,6 +22,24 @@
  */
 #define PCIE_PME_TO_L2_TIMEOUT_US	10000
 
+/* Message Routing (r[2:0]) */
+#define PCI_MSG_TYPE_R_RC	0
+#define PCI_MSG_TYPE_R_ADDR	1
+#define PCI_MSG_TYPE_R_ID	2
+#define PCI_MSG_TYPE_R_BC	3
+#define PCI_MSG_TYPE_R_LOCAL	4
+#define PCI_MSG_TYPE_R_GATHER	5
+
+/* INTx Mechanism Messages */
+#define PCI_MSG_CODE_ASSERT_INTA	0x20
+#define PCI_MSG_CODE_ASSERT_INTB	0x21
+#define PCI_MSG_CODE_ASSERT_INTC	0x22
+#define PCI_MSG_CODE_ASSERT_INTD	0x23
+#define PCI_MSG_CODE_DEASSERT_INTA	0x24
+#define PCI_MSG_CODE_DEASSERT_INTB	0x25
+#define PCI_MSG_CODE_DEASSERT_INTC	0x26
+#define PCI_MSG_CODE_DEASSERT_INTD	0x27
+
 extern const unsigned char pcie_link_speed[];
 extern bool pci_early_dump;
 

-- 
2.34.1