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Message-ID: <24fe6adbf2424360618e8f5ca541ebfd8bb0723e.1706692641.git.michal.simek@amd.com>
Date: Wed, 31 Jan 2024 10:17:28 +0100
From: Michal Simek <michal.simek@....com>
To: <linux-kernel@...r.kernel.org>, <monstr@...str.eu>,
<michal.simek@...inx.com>, <git@...inx.com>
CC: Conor Dooley <conor+dt@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Rob Herring <robh+dt@...nel.org>, "open
list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, kishore Manne <nava.kishore.manne@....com>,
"moderated list:ARM/ZYNQ ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>
Subject: [PATCH v2] dt-bindings: firmware: xilinx: Describe soc-nvmem subnode
Describe soc-nvmem subnode as the part of firmware node. The name can't be
pure nvmem because dt-schema already defines it as array property that's
why different name should be used.
Signed-off-by: Michal Simek <michal.simek@....com>
---
Changes in v2:
- Fix typo in subject
- Make example bigger requested by Conor
Dt binding for nvmem node has been already merged and it is the part of
linux-next tree.
Here is the reference to it just in case:
https://lore.kernel.org/r/170635581622.41421.8980881999042944764.b4-ty@linaro.org
v1 available here:
https://lore.kernel.org/r/3869498c995cbb123127122f429e90de0a3f4014.1706531104.git.michal.simek@amd.com
---
.../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
index 870b94813a43..741f17c830f4 100644
--- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
@@ -62,6 +62,12 @@ properties:
interface.
type: object
+ soc-nvmem:
+ $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml#
+ description: The ZynqMP MPSoC provides access to the hardware related data
+ like SOC revision, IDCODE and specific purpose efuses.
+ type: object
+
pcap:
$ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
@@ -110,6 +116,18 @@ examples:
firmware {
zynqmp_firmware: zynqmp-firmware {
#power-domain-cells = <1>;
+ soc-nvmem {
+ compatible = "xlnx,zynqmp-nvmem-fw";
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ soc_revision: soc-revision@0 {
+ reg = <0x0 0x4>;
+ };
+ };
+ };
gpio {
compatible = "xlnx,zynqmp-gpio-modepin";
gpio-controller;
--
2.36.1
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