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Message-ID: <d2ff1f95-709b-4dbd-b0a0-639193f18c2c@intel.com>
Date: Thu, 1 Feb 2024 23:42:45 +0800
From: "Huang, Kai" <kai.huang@...el.com>
To: Paolo Bonzini <pbonzini@...hat.com>, <linux-kernel@...r.kernel.org>,
<kvm@...r.kernel.org>
CC: Zixi Chen <zixchen@...hat.com>, Adam Dunlap <acdunlap@...gle.com>, "Kirill
A . Shutemov" <kirill.shutemov@...ux.intel.com>, Xiaoyao Li
<xiaoyao.li@...el.com>, Dave Hansen <dave.hansen@...ux.intel.com>, "Thomas
Gleixner" <tglx@...utronix.de>, Ingo Molnar <mingo@...nel.org>,
<x86@...nel.org>, <stable@...r.kernel.org>
Subject: Re: [PATCH v2 2/2] x86/cpu/intel: Detect TME keyid bits before
setting MTRR mask registers
> static void early_init_intel(struct cpuinfo_x86 *c)
> {
> u64 misc_enable;
> @@ -322,6 +406,13 @@ static void early_init_intel(struct cpuinfo_x86 *c)
> */
> if (detect_extended_topology_early(c) < 0)
> detect_ht_early(c);
> +
> + /*
> + * Adjust the number of physical bits early because it affects the
> + * valid bits of the MTRR mask registers.
> + */
> + if (cpu_has(c, X86_FEATURE_TME))
> + detect_tme_early(c);
> }
>
early_init_intel() is also called by init_intel(), so IIUC for BSP
detect_tme_early() will be called twice.
But this is no harm AFAICT, so:
Acked-by: Kai Huang <kai.huang@...el.com>
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