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Date: Thu, 01 Feb 2024 15:46:28 +0000
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: Oleg Nesterov <oleg@...hat.com>, 
 Thomas Bogendoerfer <tsbogend@...ha.franken.de>, 
 Andrew Morton <akpm@...ux-foundation.org>, 
 Ben Hutchings <ben@...adent.org.uk>
Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-mips@...r.kernel.org, linux-mm@...ck.org, 
 Jiaxun Yang <jiaxun.yang@...goat.com>
Subject: [PATCH 2/3] MIPS: Clear Cause.BD in instruction_pointer_set

Clear Cause.BD after we use instruction_pointer_set to override
EPC.

This can prevent exception_epc check against instruction code at
new return address.
It won't be considered as "in delay slot" after epc being overridden
anyway.

Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
---
 arch/mips/include/asm/ptrace.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 97589731fd40..845508008e90 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -60,6 +60,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs,
                                            unsigned long val)
 {
 	regs->cp0_epc = val;
+	regs->cp0_cause &= ~CAUSEF_BD;
 }
 
 /* Query offset/name of register from its name/offset */

-- 
2.43.0


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