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Message-ID: <127a9b07-214c-45b7-90fb-46d4303fee62@intel.com>
Date: Thu, 1 Feb 2024 08:42:21 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Tony W Wang-oc <TonyWWang-oc@...oxin.com>, herbert@...dor.apana.org.au,
davem@...emloft.net, linux-crypto@...r.kernel.org,
linux-kernel@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
bp@...en8.de, dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
seanjc@...gle.com, kim.phillips@....com, kirill.shutemov@...ux.intel.com,
jmattson@...gle.com, babu.moger@....com, kai.huang@...el.com,
acme@...hat.com, aik@....com, namhyung@...nel.org
Cc: CobeChen@...oxin.com, TimGuo@...oxin.com, LeoLiu-oc@...oxin.com,
GeorgeXue@...oxin.com
Subject: Re: [PATCH v2 1/3] crypto: padlock-sha: Matches CPU with Family with
6 explicitly
On 1/31/24 18:37, Tony W Wang-oc wrote:
> Sorry. It should be said that there are non-CENTAUR or non-family-6 CPUs
> that set X86_FEATURE_PHE,
>
> and also set the new X86_FEATURE_PHE2. For these CPUs, we expect to use
> a new driver that supports
>
> both X86_FEATURE_PHE and X86_FEATURE_PHE2.
>
> So we make the driver padlock-sha to matches CENTAUR Family-6 CPU
> explicitly.
Could you please take a look at how this is done for the existing crypto
algorithms? This doesn't seem horribly new. We have AVX-512-based
algorithms that somehow work on systems that also have AVX and AVX2
support. Yet, there are no other vendor or family matches in the
x86_cpu_id arrays for them. Why?
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