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Message-ID: <20240201175312.GA640762@bhelgaas>
Date: Thu, 1 Feb 2024 11:53:12 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Frank Li <Frank.Li@....com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, Jingoo Han <jingoohan1@...il.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, imx@...ts.linux.dev,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
Serge Semin <fancer.lancer@...il.com>
Subject: Re: [PATCH 1/6] PCI: Add INTx Mechanism Messages macros
On Wed, Jan 31, 2024 at 09:37:48AM -0600, Bjorn Helgaas wrote:
> On Tue, Jan 30, 2024 at 07:45:26PM -0500, Frank Li wrote:
> ...
> With these updates:
>
> Acked-by: Bjorn Helgaas <bhelgaas@...gle.com>
Sorry, I should have mentioned that there were more comments below.
> > ---
> > drivers/pci/pci.h | 18 ++++++++++++++++++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> > index 2336a8d1edab2..fe42f5d10b010 100644
> > --- a/drivers/pci/pci.h
> > +++ b/drivers/pci/pci.h
> > @@ -22,6 +22,24 @@
> > */
> > #define PCIE_PME_TO_L2_TIMEOUT_US 10000
> >
> > +/* Message Routing (r[2:0]) */
>
> Add citation to the comment: "PCIe r6.0, sec 2.2.8"
>
> > +#define PCI_MSG_TYPE_R_RC 0
>
> I think I would prefix all these with "PCIE" instead of "PCI", since
> they are specific to PCIe and we already use "PCIE" for some of the
> PCIe-specific timeouts.
>
> > +#define PCI_MSG_TYPE_R_ADDR 1
> > +#define PCI_MSG_TYPE_R_ID 2
> > +#define PCI_MSG_TYPE_R_BC 3
> > +#define PCI_MSG_TYPE_R_LOCAL 4
> > +#define PCI_MSG_TYPE_R_GATHER 5
> > +
> > +/* INTx Mechanism Messages */
>
> Add "PCIe r6.0, sec 2.2.8.1"
>
> > +#define PCI_MSG_CODE_ASSERT_INTA 0x20
> > +#define PCI_MSG_CODE_ASSERT_INTB 0x21
> > +#define PCI_MSG_CODE_ASSERT_INTC 0x22
> > +#define PCI_MSG_CODE_ASSERT_INTD 0x23
> > +#define PCI_MSG_CODE_DEASSERT_INTA 0x24
> > +#define PCI_MSG_CODE_DEASSERT_INTB 0x25
> > +#define PCI_MSG_CODE_DEASSERT_INTC 0x26
> > +#define PCI_MSG_CODE_DEASSERT_INTD 0x27
> > +
> > extern const unsigned char pcie_link_speed[];
> > extern bool pci_early_dump;
> >
> >
> > --
> > 2.34.1
> >
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