linux-kernel - Re: [PATCH v5 05/21] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode

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Date: Thu, 01 Feb 2024 14:52:05 +1030
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>, patrick@...cx.xyz, Rob
 Herring <robh+dt@...nel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
 Joel Stanley <joel@....id.au>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 05/21] ARM: dts: aspeed: yosemite4: Revise quad mode
 to dual mode

On Wed, 2024-01-31 at 16:41 +0800, Delphine CC Chiu wrote:
> Revise quad mode to dual mode to avoid WP pin influnece the SPI

What do you mean by this? Can you unpack what's going on a little more
in the commit message?

Andrew

> 
> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
> ---
>  .../arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> index f8bfdefbefc6..23006dca5f26 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> @@ -149,15 +149,17 @@ flash@0 {
>  		status = "okay";
>  		m25p,fast-read;
>  		label = "bmc";
> -		spi-rx-bus-width = <4>;
> +		spi-tx-bus-width = <2>;
> +		spi-rx-bus-width = <2>;
>  		spi-max-frequency = <50000000>;
> -#include "openbmc-flash-layout-64.dtsi"
> +#include "openbmc-flash-layout-128.dtsi"
>  	};
>  	flash@1 {
>  		status = "okay";
>  		m25p,fast-read;
>  		label = "bmc2";
> -		spi-rx-bus-width = <4>;
> +		spi-tx-bus-width = <2>;
> +		spi-rx-bus-width = <2>;
>  		spi-max-frequency = <50000000>;
>  	};
>  };