lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Thu, 1 Feb 2024 13:52:07 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Rengarajan.S@...rochip.com
Cc: Kumaravel.Thiagarajan@...rochip.com, jiaqing.zhao@...ux.intel.com,
	gregkh@...uxfoundation.org, ilpo.jarvinen@...ux.intel.com,
	john.ogness@...utronix.de, tony@...mide.com,
	linux-kernel@...r.kernel.org, Tharunkumar.Pasumarthi@...rochip.com,
	jirislaby@...nel.org, f.fainelli@...il.com, tglx@...utronix.de,
	UNGLinuxDriver@...rochip.com, linux-serial@...r.kernel.org
Subject: Re: [PATCH v1 tty] 8250: microchip: Add 4 Mbps support in PCI1XXXX
 UART

On Tue, Jan 30, 2024 at 10:52:41AM +0000, Rengarajan.S@...rochip.com wrote:
> On Sun, 2024-01-28 at 17:27 +0200, Andy Shevchenko wrote:
> > On Thu, Jan 25, 2024 at 03:36:19PM +0530, Rengarajan S wrote:

..

> > > +     /*
> > > +      * Microchip PCI1XXXX UART supports maximum baud rate up to 4
> > > Mbps
> > > +      */
> > > +     if (up->port.type == PORT_MCHP16550A)
> > > +             max = 4000000;
> > 
> > No. Please refactor the way the 8250_port won't be modified.
> > 
> > Also you have a define for this constant, use it.
> 
> The current UART clk in MCHP Ports in pci1xxxx.c is set to 62.5 MHz in
> order to support fractional baud rates which enables generation of
> acceptable baud rate and lower error percentage from any available
> frequency. With 62.5 MHz the maximum supported baud rate supported as
> per serial_8250_get_baud_rate is 3.9 Mbps. In order to extend the
> support to 4 Mbps we had hardcoded the max value to 4 Mbps. Since, baud
> rate is calculated here we needed to make these changes in 8250_port
> and could not find a way to handle as part 8250_pci1xxxx. Can you let
> us know any alternatives to address this upper(max) limit? 

Update port->uartclk accordingly in your driver, see how other 8250_* drivers
do that (e.g., 8250_mid).

So, it will no go with hack in the 8250_port.

-- 
With Best Regards,
Andy Shevchenko



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ