[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date: Fri, 2 Feb 2024 18:11:44 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: Qi Tao <taoqi10@...wei.com>
Cc: davem@...emloft.net, liulongfang@...wei.com,
linux-kernel@...r.kernel.org, linux-crypto@...r.kernel.org
Subject: Re: [PATCH v2 0/4] some updates and cleanups for hisilicon/sec2.
On Fri, Jan 26, 2024 at 05:38:24PM +0800, Qi Tao wrote:
> This seires patch mainly add some RAS registers to enhance the
> DFX positioning function and fix some cleanup issues.
>
> [PATCH v1 3/4] -> [PATCH v2 3/4]
> sec_sqe3->c_len_ivin |= cpu_to_le32(c_req->c_len);
> - sec_sqe3->tag = cpu_to_le64((unsigned long)(uintptr_t)req);
> + sec_sqe3->tag = cpu_to_le64((unsigned long)req);
>
> Other patches are not modified.
>
> Qi Tao (3):
> crypto: hisilicon/sec2 - updates the sec DFX function register
> crypto: hisilicon/sec2 - modify nested macro call
> crypto: hisilicon/sec2 - fix some cleanup issues
>
> Wenkai Lin (1):
> crypto: hisilicon/sec - remove unused parameter
>
> drivers/crypto/hisilicon/sec2/sec_crypto.c | 33 ++++++++--------------
> drivers/crypto/hisilicon/sec2/sec_main.c | 5 ++++
> 2 files changed, 17 insertions(+), 21 deletions(-)
>
> --
> 2.33.0
All applied. Thanks.
--
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Powered by blists - more mailing lists