linux-kernel - Re: [PATCH v4 2/5] phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration

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Date: Fri, 2 Feb 2024 13:37:56 +0200
From: Roger Quadros <rogerq@...nel.org>
To: Swapnil Jakhade <sjakhade@...ence.com>, vkoul@...nel.org,
 kishon@...nel.org, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
 conor+dt@...nel.org, linux-phy@...ts.infradead.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Cc: mparab@...ence.com, s-vadapalli@...com
Subject: Re: [PATCH v4 2/5] phy: cadence-torrent: Add PCIe(100MHz) +
 USXGMII(156.25MHz) multilink configuration



On 04/01/2024 15:30, Swapnil Jakhade wrote:
> Torrent PHY can have separate input reference clocks for PLL0 and PLL1.
> Add support for dual reference clock multilink configurations.
> 
> Add register sequences for PCIe(100MHz) + USXGMII(156.25MHz) multilink
> configuration. PCIe uses PLL0 and USXGMII uses PLL1.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@...ence.com>

Reviewed-by: Roger Quadros <rogerq@...nel.org>