[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <170697997763.332807.2581003404084047769.b4-ty@kernel.org>
Date: Sat, 3 Feb 2024 11:06:17 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>
Cc: linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm8650: Use GIC-ITS for PCIe0 and PCIe1
On Thu, 25 Jan 2024 17:55:04 +0100, Neil Armstrong wrote:
> Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs
> received from endpoint devices to the CPU using GIC-ITS MSI controller.
> Add support for it.
>
> The GIC-ITS MSI implementation provides an advantage over internal MSI
> implementation using Locality-specific Peripheral Interrupts (LPI) that
> would allow MSIs to be targeted for each CPU core.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: sm8650: Use GIC-ITS for PCIe0 and PCIe1
commit: a33a532b3b1ecd6a64f6280d29d19f3ed6e31a92
Best regards,
--
Bjorn Andersson <andersson@...nel.org>
Powered by blists - more mailing lists