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Message-ID: <20240204235134.GA804317@dragon>
Date: Mon, 5 Feb 2024 07:51:34 +0800
From: Shawn Guo <shawn.gsc@...il.com>
To: Shengjiu Wang <shengjiu.wang@....com>
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] arm64: dts: imx8mm-evk: Add PDM micphone sound card
support
On Thu, Dec 21, 2023 at 01:23:07PM +0800, Shengjiu Wang wrote:
> Add PDM micphone sound card support, configure the pinmux.
>
> This sound card supports recording sound from PDM micphone
> and convert the PDM format data to PCM data.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 34 +++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> index b53104ed8919..9679786dac51 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> @@ -151,6 +151,18 @@ simple-audio-card,codec {
> clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
> };
> };
> +
> + sound-micfil {
> + compatible = "fsl,imx-audio-card";
> + model = "micfil-audio";
Have a newline between properties and child node.
> + pri-dai-link {
> + link-name = "micfil hifi";
> + format = "i2s";
Ditto
Shawn
> + cpu {
> + sound-dai = <&micfil>;
> + };
> + };
> + };
> };
>
> &A53_0 {
> @@ -434,6 +446,16 @@ &lcdif {
> status = "okay";
> };
>
> +&micfil {
> + #sound-dai-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pdm>;
> + assigned-clocks = <&clk IMX8MM_CLK_PDM>;
> + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
> + assigned-clock-rates = <196608000>;
> + status = "okay";
> +};
> +
> &mipi_csi {
> status = "okay";
>
> @@ -636,6 +658,18 @@ MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41
> >;
> };
>
> + pinctrl_pdm: pdmgrp {
> + fsl,pins = <
> + MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6
> + MX8MM_IOMUXC_SAI5_RXC_PDM_CLK 0xd6
> + MX8MM_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC 0xd6
> + MX8MM_IOMUXC_SAI5_RXD0_PDM_DATA0 0xd6
> + MX8MM_IOMUXC_SAI5_RXD1_PDM_DATA1 0xd6
> + MX8MM_IOMUXC_SAI5_RXD2_PDM_DATA2 0xd6
> + MX8MM_IOMUXC_SAI5_RXD3_PDM_DATA3 0xd6
> + >;
> + };
> +
> pinctrl_pmic: pmicirqgrp {
> fsl,pins = <
> MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
> --
> 2.34.1
>
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