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Message-ID: <170716075503.138486.15196612878281167365.robh@kernel.org>
Date: Mon, 5 Feb 2024 19:19:15 +0000
From: Rob Herring <robh@...nel.org>
To: Adam Ford <aford173@...il.com>
Cc: Andrzej Hajda <andrzej.hajda@...el.com>,
	David Airlie <airlied@...il.com>,
	NXP Linux Team <linux-imx@....com>, linux-kernel@...r.kernel.org,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	frieder.schrempf@...tron.de, alexander.stein@...tq-group.com,
	Maxime Ripard <mripard@...nel.org>,
	linux-arm-kernel@...ts.infradead.org,
	Lucas Stach <l.stach@...gutronix.de>,
	Rob Herring <robh+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, marex@...x.de,
	Robert Foss <rfoss@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
	Jernej Skrabec <jernej.skrabec@...il.com>,
	Liu Ying <victor.liu@....com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org,
	Vinod Koul <vkoul@...nel.org>, Jonas Karlman <jonas@...boo.se>,
	linux-phy@...ts.infradead.org, dri-devel@...ts.freedesktop.org,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Shawn Guo <shawnguo@...nel.org>, Daniel Vetter <daniel@...ll.ch>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Will Deacon <will@...nel.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Kishon Vijay Abraham I <kishon@...nel.org>,
	linux-pm@...r.kernel.org
Subject: Re: [PATCH V8 03/12] dt-bindings: soc: imx: add missing clock and
 power-domains to imx8mp-hdmi-blk-ctrl


On Sat, 03 Feb 2024 10:52:43 -0600, Adam Ford wrote:
> Per guidance from the NXP downstream kernel, if the clock is
> disabled before HDMI/LCDIF probe, LCDIF will not get pixel
> clock from HDMI PHY and throw an error:
> 
> [CRTC:39:crtc-2] vblank wait timed out
>     WARNING: CPU: 2 PID: 9 at drivers/gpu/drm/drm_atomic_helper.c:
>         1634 drm_atomic_helper_wait_for_vblanks.part.0+0x23c/0x260
> 
> Fix this by adding the fdcc clock to the hdmi_blk_ctrl.  This
> should be safe, since neither this power domain nor the dependent
> HDMI and LCDIF drivers been enabled or added to the SoC device
> tree yet.
> 
> According to Sandor Yu from NXP, "the FDCC clock is not for HDMITX
> in desgin, but it is part of HDMI domain that needed by HDMITX.
> So I think it is reasonable added it to the power domain driver."
> 
> The driver also supports two power domains which are missing from the binding
> that also fix an issue with resuming from suspend.
> 
> Signed-off-by: Adam Ford <aford173@...il.com>
> ---
> V2:  Update commit message to both show error and give a bit more
>      background.
>      Add missing power domains hdcp and hdrv as pointed out by Marek Vasut
> ---
>  .../soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml     | 22 ++++++++++++-------
>  1 file changed, 14 insertions(+), 8 deletions(-)
> 

Reviewed-by: Rob Herring <robh@...nel.org>


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