linux-kernel - Re: [PATCH v3 5/6] dt-bindings: PCI: dwc: Add 'msg' register region

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <ZcEzYdZKotBJlR5i@lizhi-Precision-Tower-5810>
Date: Mon, 5 Feb 2024 14:13:37 -0500
From: Frank Li <Frank.li@....com>
To: Rob Herring <robh@...nel.org>
Cc: Serge Semin <fancer.lancer@...il.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Jingoo Han <jingoohan1@...il.com>,
	Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof Wilczyński <kw@...ux.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, imx@...ts.linux.dev,
	linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH v3 5/6] dt-bindings: PCI: dwc: Add 'msg' register region

On Mon, Feb 05, 2024 at 06:30:48PM +0000, Rob Herring wrote:
> On Sat, Feb 03, 2024 at 01:44:31AM +0300, Serge Semin wrote:
> > On Fri, Feb 02, 2024 at 10:11:27AM -0500, Frank Li wrote:
> > > Add an outbound iATU-capable memory-region which will be used to send PCIe
> > > message (such as PME_Turn_Off) to peripheral. So all platforms can use
> > > common method to send out PME_Turn_Off message by using one outbound iATU.
> > > 
> > > Signed-off-by: Frank Li <Frank.Li@....com>
> > > ---
> > >  Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> > > index 022055edbf9e6..25a5420a9ce1e 100644
> > > --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> > > +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> > > @@ -101,6 +101,10 @@ properties:
> > 
> > >              Outbound iATU-capable memory-region which will be used to access
> > >              the peripheral PCIe devices configuration space.
> > >            const: config
> > > +        - description:
> > > +            Outbound iATU-capable memory-region which will be used to send
> > > +            PCIe message (such as PME_Turn_Off) to peripheral.
> > > +          const: msg
> > 
> > Note there is a good chance Rob won't like this change. AFAIR he
> > already expressed a concern regarding having the "config" reg-name
> > describing a memory space within the outbound iATU memory which is
> > normally defined by the "ranges" property. Adding a new reg-entry with
> > similar semantics I guess won't receive warm welcome.
> 
> I do think it is a bit questionable. Ideally, the driver could 
> just configure this on its own. However, since we don't describe all of 
> the CPU address space (that's input to the iATU) already, that's not 
> going to be possible. I suppose we could fix that, but then config space 
> would have to be handled differently too.

Sorry, I have not understand what your means. Do you means, you want
a "cpu-space", for example, 0x8000000 - 0x9000000 for all ATU. 

Then allocated some space to 'config', 'io', 'memory' and this 'msg'.

Frank

> 
> Rob